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| author | azidar | 2015-07-21 11:42:06 -0700 |
|---|---|---|
| committer | azidar | 2015-07-21 11:42:06 -0700 |
| commit | d1c11b612201d1d167ece627350a35b303cf4e8b (patch) | |
| tree | fc7a634030d7b18c8db4e4a76f08271e6a9ac200 /src/main/stanza/ir-parser.stanza | |
| parent | c093b68df9c461fb44306a1845bba7dc40d3136c (diff) | |
| parent | c69a45738f40e234ffb82db0f6030f7d185dc305 (diff) | |
Merge branch 'new-low-firrtl' of github.com:ucb-bar/firrtl into new-low-firrtl
Diffstat (limited to 'src/main/stanza/ir-parser.stanza')
| -rw-r--r-- | src/main/stanza/ir-parser.stanza | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/main/stanza/ir-parser.stanza b/src/main/stanza/ir-parser.stanza index 96c50c3c..7e07eb8b 100644 --- a/src/main/stanza/ir-parser.stanza +++ b/src/main/stanza/ir-parser.stanza @@ -167,7 +167,7 @@ defsyntax firrtl : if not empty?(rest) : FPE(rest, "Expected a statement here.") InModule(first-info(form),name, ps, Begin(cs)) - module = (exmodule ?name:#id! #:! (?ps:#port ... ?rest ...)) : + module = (extmodule ?name:#id! #:! (?ps:#port ... ?rest ...)) : if not empty?(rest) : FPE(rest, "Expected a port here.") ExModule(first-info(form),name, ps) @@ -210,7 +210,10 @@ defsyntax firrtl : accdir = (rdwr) : RDWR defrule width : - width = (?x:#int) : IntWidth(x) + width = (?x:#intorlong) : + match(x) : + (x:Int) : IntWidth(x) + (x:Long) : LongWidth(x) width = (?) : UnknownWidth() ;Main Statement Productions |
