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| author | azidar | 2015-12-11 10:44:27 -0800 |
|---|---|---|
| committer | azidar | 2015-12-11 10:44:27 -0800 |
| commit | 2beab33ac298470bc04caf1c3b7a5a0d17d465d4 (patch) | |
| tree | 137717e2bf63ebc838ab63c412f133983dd59898 /src/main/stanza/firrtl-test-main.stanza | |
| parent | 2b04de4567e0ade01fdbfa6921fae91537180461 (diff) | |
Added LoFirrtl compiler, can be called with -X lofirrtl
Diffstat (limited to 'src/main/stanza/firrtl-test-main.stanza')
| -rw-r--r-- | src/main/stanza/firrtl-test-main.stanza | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/main/stanza/firrtl-test-main.stanza b/src/main/stanza/firrtl-test-main.stanza index 2f8e84d5..238a2afc 100644 --- a/src/main/stanza/firrtl-test-main.stanza +++ b/src/main/stanza/firrtl-test-main.stanza @@ -141,6 +141,7 @@ defn main () : ; run-passes(circuit*,StandardFlo(with-output)) "verilog" : run-passes(circuit*,StandardVerilog(with-output)) "firrtl" : run-passes(circuit*,StandardFIRRTL(with-output)) + "lofirrtl" : run-passes(circuit*,StandardLoFIRRTL(with-output)) "verilute" : run-passes(circuit*,InstrumentedVerilog(with-output,to-list $ pass-args)) else : error("Invalid compiler flag") |