diff options
| author | Adam Izraelevitz | 2015-06-02 12:09:17 -0700 |
|---|---|---|
| committer | Adam Izraelevitz | 2015-06-02 12:09:17 -0700 |
| commit | 880bc208ca55d9e64af7b98c91b46204a3682a0b (patch) | |
| tree | 84dfcb57d974d7c44b9d7fce7ea7119980fea81f /src/main/stanza/compilers.stanza | |
| parent | 8fc826a2770f46d63d8d7b1bccf14d2bf6e6b7cd (diff) | |
| parent | e4e6c8cb3e8876aa468497917ecff7ebfff567a4 (diff) | |
Merge pull request #11 from jackbackrack/master
fix pad/trimming pass and fix bits-select width inference bug
Diffstat (limited to 'src/main/stanza/compilers.stanza')
| -rw-r--r-- | src/main/stanza/compilers.stanza | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/stanza/compilers.stanza b/src/main/stanza/compilers.stanza index efa8c992..67c6bfeb 100644 --- a/src/main/stanza/compilers.stanza +++ b/src/main/stanza/compilers.stanza @@ -13,7 +13,7 @@ public defstruct StandardFlo <: Compiler : public defmethod passes (c:StandardFlo) -> List<Pass> : to-list $ [ CheckHighForm(expand-delin) - TempElimination() + ;; TempElimination() ToWorkingIR() MakeExplicitReset() ResolveKinds() @@ -42,7 +42,7 @@ public defstruct StandardVerilog <: Compiler : public defmethod passes (c:StandardVerilog) -> List<Pass> : to-list $ [ CheckHighForm(expand-delin) - TempElimination() + ;; TempElimination() ToWorkingIR() MakeExplicitReset() ResolveKinds() |