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| author | Andrew Waterman | 2015-10-01 15:15:09 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2015-10-01 15:15:09 -0700 |
| commit | 42307c1f72c8799f8db52a6859c4b7b1ed114c3d (patch) | |
| tree | ffb6f0bc6f07b827b7f34814de232231bc82f968 /src/main/stanza/compilers.stanza | |
| parent | 8cbb0286f7b007fe54bf55452a25121357537dcb (diff) | |
| parent | 4726d8b6ca56435d861cb74f52f1237e3b43ae38 (diff) | |
Merge pull request #41 from ucb-bar/fix-init-accessor
Fix init accessor
Diffstat (limited to 'src/main/stanza/compilers.stanza')
| -rw-r--r-- | src/main/stanza/compilers.stanza | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/main/stanza/compilers.stanza b/src/main/stanza/compilers.stanza index 1e978a2e..0ea9a367 100644 --- a/src/main/stanza/compilers.stanza +++ b/src/main/stanza/compilers.stanza @@ -25,7 +25,7 @@ public defmethod passes (c:StandardFlo) -> List<Pass> : CheckGenders() ExpandAccessors() LowerToGround() - ExpandIndexedConnects() + InlineIndexed() ExpandWhens() InferWidths() Pad() @@ -44,7 +44,7 @@ public defstruct StandardVerilog <: Compiler : public defmethod passes (c:StandardVerilog) -> List<Pass> : to-list $ [ RemoveSpecialChars() ;R - RemoveScopes() ;R + ;RemoveScopes() ;R CheckHighForm() ;R TempElimination() ;R ToWorkingIR() ;R -> W @@ -56,15 +56,17 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> : CheckTypes() ;R ExpandAccessors() ;W LowerToGround() ;W - ExpandIndexedConnects() ;W + ;ExpandIndexedConnects() ;W + InlineIndexed() InferTypes() ;R CheckGenders() ;W ExpandWhens() ;W InferWidths() ;R + ToRealIR() ;W -> R + CheckWidths() ;R Pad() ;R ConstProp() ;R SplitExp() ;R - ToRealIR() ;W -> R CheckWidths() ;R CheckHighForm() ;R CheckLowForm() ;R |