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| author | azidar | 2016-01-24 14:13:52 -0800 |
|---|---|---|
| committer | azidar | 2016-01-24 14:13:52 -0800 |
| commit | 2e1c88aed7a67aa216f95a446f60a93a85cc47b0 (patch) | |
| tree | 26c44d0f9d953a08921f090c0d8a1a9dad0dfcd3 /src/main/stanza/chirrtl.stanza | |
| parent | 2dd174cedc7e7923e2492fdec79a6f9045f2429e (diff) | |
Added DefMemory to CInfer Types
Diffstat (limited to 'src/main/stanza/chirrtl.stanza')
| -rw-r--r-- | src/main/stanza/chirrtl.stanza | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/main/stanza/chirrtl.stanza b/src/main/stanza/chirrtl.stanza index 7d6d9d3f..2ac76a05 100644 --- a/src/main/stanza/chirrtl.stanza +++ b/src/main/stanza/chirrtl.stanza @@ -114,6 +114,9 @@ defn infer-types (c:Circuit) -> Circuit : val t = type(value(s*)) types[name(s*)] = t s* + (s:DefMemory) : + types[name(s)] = get-type(s) + s (s:CDefMPort) : val t = types[mem(s)] types[name(s)] = t |