diff options
| author | Jack Koenig | 2017-07-18 10:10:18 -0700 |
|---|---|---|
| committer | GitHub | 2017-07-18 10:10:18 -0700 |
| commit | a54e32ab20ef521d18080f1c02d77339118b95e2 (patch) | |
| tree | 76de155cd5314bdee2cbac07066d829c85a63b6d /src/main/scala | |
| parent | 661147d84d8c27a5b4f051ced12ebf7efecb40dc (diff) | |
| parent | 97642d6ddeca4e2109010ac5d6a0a199df01f28c (diff) | |
Merge pull request #626 from freechipsproject/fix-swap-bug
Fix ConstProp bug where multiple names would swap with one
Diffstat (limited to 'src/main/scala')
| -rw-r--r-- | src/main/scala/firrtl/transforms/ConstantPropagation.scala | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/transforms/ConstantPropagation.scala b/src/main/scala/firrtl/transforms/ConstantPropagation.scala index bf8b1a55..d5a4b7e1 100644 --- a/src/main/scala/firrtl/transforms/ConstantPropagation.scala +++ b/src/main/scala/firrtl/transforms/ConstantPropagation.scala @@ -304,7 +304,9 @@ class ConstantPropagation extends Transform { // When propagating a reference, check if we want to keep the name that would be deleted def propagateRef(lname: String, value: Expression): Unit = { value match { - case WRef(rname,_,_,_) if betterName(lname, rname) => + case WRef(rname,_,_,_) if betterName(lname, rname) && !swapMap.contains(rname) => + assert(!swapMap.contains(lname)) // <- Shouldn't be possible because lname is either a + // node declaration or the single connection to a wire or register swapMap += (lname -> rname, rname -> lname) case _ => } @@ -315,7 +317,7 @@ class ConstantPropagation extends Transform { val stmtx = s map constPropStmt map constPropExpression stmtx match { case x: DefNode if !dontTouches.contains(x.name) => propagateRef(x.name, x.value) - case Connect(_, WRef(wname, wtpe, WireKind, _), expr) if !dontTouches.contains(wname) => + case Connect(_, WRef(wname, wtpe, WireKind, _), expr: Literal) if !dontTouches.contains(wname) => val exprx = constPropExpression(pad(expr, wtpe)) propagateRef(wname, exprx) // Const prop registers that are fed only a constant or a mux between and constant and the |
