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authorLeway Colin2019-07-09 01:41:02 +0800
committermergify[bot]2019-07-08 17:41:02 +0000
commitaa571e1d4f76d095344a9deed28dfa70f704fa75 (patch)
tree77e34d92f04f32f7c3c28bde8c9dac2892943ac5 /src/main/scala/firrtl/transforms
parent648dddeacd9aece4a43cad09430dad25cba69457 (diff)
Remove some warnings (#1118)
Diffstat (limited to 'src/main/scala/firrtl/transforms')
-rw-r--r--src/main/scala/firrtl/transforms/Dedup.scala1
-rw-r--r--src/main/scala/firrtl/transforms/Flatten.scala3
-rw-r--r--src/main/scala/firrtl/transforms/RemoveKeywordCollisions.scala1
-rw-r--r--src/main/scala/firrtl/transforms/TopWiring.scala10
4 files changed, 5 insertions, 10 deletions
diff --git a/src/main/scala/firrtl/transforms/Dedup.scala b/src/main/scala/firrtl/transforms/Dedup.scala
index 1db1e1ed..cd55a9a4 100644
--- a/src/main/scala/firrtl/transforms/Dedup.scala
+++ b/src/main/scala/firrtl/transforms/Dedup.scala
@@ -235,7 +235,6 @@ object DedupModules {
val instances = mutable.Set[WDefInstance]()
InstanceGraph.collectInstances(instances)(module.asInstanceOf[Module].body)
val instanceModuleMap = instances.map(i => i.name -> i.module).toMap
- val moduleNames = instances.map(_.module)
def getNewModule(old: String): DefModule = {
moduleMap(name2name(old))
diff --git a/src/main/scala/firrtl/transforms/Flatten.scala b/src/main/scala/firrtl/transforms/Flatten.scala
index a94f5d5a..658f0987 100644
--- a/src/main/scala/firrtl/transforms/Flatten.scala
+++ b/src/main/scala/firrtl/transforms/Flatten.scala
@@ -26,7 +26,7 @@ class Flatten extends Transform {
val inlineTransform = new InlineInstances
private def collectAnns(circuit: Circuit, anns: Iterable[Annotation]): (Set[ModuleName], Set[ComponentName]) =
- anns.foldLeft(Set.empty[ModuleName], Set.empty[ComponentName]) {
+ anns.foldLeft( (Set.empty[ModuleName], Set.empty[ComponentName]) ) {
case ((modNames, instNames), ann) => ann match {
case FlattenAnnotation(CircuitName(c)) =>
(circuit.modules.collect {
@@ -106,7 +106,6 @@ class Flatten extends Transform {
annos match {
case Nil => state
case myAnnotations =>
- val c = state.circuit
val (modNames, instNames) = collectAnns(state.circuit, myAnnotations)
// take incoming annotation and produce annotations for InlineInstances, i.e. traverse circuit down to find all instances to inline
val (newc, modsToInline) = duplicateSubCircuitsFromAnno(state.circuit, modNames, instNames)
diff --git a/src/main/scala/firrtl/transforms/RemoveKeywordCollisions.scala b/src/main/scala/firrtl/transforms/RemoveKeywordCollisions.scala
index 9eee69d4..1f0202d1 100644
--- a/src/main/scala/firrtl/transforms/RemoveKeywordCollisions.scala
+++ b/src/main/scala/firrtl/transforms/RemoveKeywordCollisions.scala
@@ -21,7 +21,6 @@ import scala.collection.mutable
class RemoveKeywordCollisions(keywords: Set[String]) extends Transform {
val inputForm: CircuitForm = LowForm
val outputForm: CircuitForm = LowForm
- private type Renames = mutable.HashMap[String, String]
private type ModuleType = mutable.HashMap[String, ir.Type]
private val inlineDelim = "_"
diff --git a/src/main/scala/firrtl/transforms/TopWiring.scala b/src/main/scala/firrtl/transforms/TopWiring.scala
index a1161ac6..945deb7e 100644
--- a/src/main/scala/firrtl/transforms/TopWiring.scala
+++ b/src/main/scala/firrtl/transforms/TopWiring.scala
@@ -70,11 +70,10 @@ class TopWiringTransform extends Transform {
case d: Port => (true, d.tpe, sourceList(ComponentName(w.name,currentmodule)))
case _ => throw new Exception(s"Cannot wire this type of declaration! ${w.serialize}")
}
- val name = w.name
sourceMap.get(currentmodule.name) match {
case Some(xs:Seq[(ComponentName, Type, Boolean, InstPath, String)]) =>
- sourceMap.update(currentmodule.name, xs :+
- (ComponentName(w.name,currentmodule), tpe, isport ,Seq[String](w.name), prefix))
+ sourceMap.update(currentmodule.name, xs :+(
+ (ComponentName(w.name,currentmodule), tpe, isport ,Seq[String](w.name), prefix) ))
case None =>
sourceMap(currentmodule.name) = Seq((ComponentName(w.name,currentmodule),
tpe, isport ,Seq[String](w.name), prefix))
@@ -103,11 +102,10 @@ class TopWiringTransform extends Transform {
case d: Port => (true, d.tpe, sourceList(ComponentName(w.name,currentmodule)))
case _ => throw new Exception(s"Cannot wire this type of declaration! ${w.serialize}")
}
- val name = w.name
sourceMap.get(currentmodule.name) match {
case Some(xs:Seq[(ComponentName, Type, Boolean, InstPath, String)]) =>
- sourceMap.update(currentmodule.name, xs :+
- (ComponentName(w.name,currentmodule), tpe, isport ,Seq[String](w.name), prefix))
+ sourceMap.update(currentmodule.name, xs :+(
+ (ComponentName(w.name,currentmodule), tpe, isport ,Seq[String](w.name), prefix) ))
case None =>
sourceMap(currentmodule.name) = Seq((ComponentName(w.name,currentmodule),
tpe, isport ,Seq[String](w.name), prefix))