Rename gender to flow

The following names are changed:
  - gender        -> flow
  - Gender        -> Flow
  - MALE          -> SourceFlow
  - FEMALE        -> SinkFlow
  - BIGENDER      -> DuplexFlow
  - UNKNOWNGENDER -> UnknownFlow

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

5 files changed, 15 insertions, 15 deletions

diff --git a/src/main/scala/firrtl/transforms/ConstantPropagation.scala b/src/main/scala/firrtl/transforms/ConstantPropagation.scala
index b781f06c..b183e059 100644
--- a/src/main/scala/firrtl/transforms/ConstantPropagation.scala
+++ b/src/main/scala/firrtl/transforms/ConstantPropagation.scala
@@ -335,9 +335,9 @@ class ConstantPropagation extends Transform with ResolvedAnnotationPaths {
     val propagated = old match {
       case p: DoPrim => constPropPrim(p)
       case m: Mux => constPropMux(m)
-      case ref @ WRef(rname, _,_, MALE) if nodeMap.contains(rname) =>
+      case ref @ WRef(rname, _,_, SourceFlow) if nodeMap.contains(rname) =>
         constPropNodeRef(ref, nodeMap(rname))
-      case ref @ WSubField(WRef(inst, _, InstanceKind, _), pname, _, MALE) =>
+      case ref @ WSubField(WRef(inst, _, InstanceKind, _), pname, _, SourceFlow) =>
         val module = instMap(inst)
         // Check constSubOutputs to see if the submodule is driving a constant
         constSubOutputs.get(module).flatMap(_.get(pname)).getOrElse(ref)
@@ -407,7 +407,7 @@ class ConstantPropagation extends Transform with ResolvedAnnotationPaths {
         case ref @ WRef(rname, _,_,_) if swapMap.contains(rname) =>
           ref.copy(name = swapMap(rname))
         // Only const prop on the rhs
-        case ref @ WRef(rname, _,_, MALE) if nodeMap.contains(rname) =>
+        case ref @ WRef(rname, _,_, SourceFlow) if nodeMap.contains(rname) =>
           constPropNodeRef(ref, nodeMap(rname))
         case x => x
       }
diff --git a/src/main/scala/firrtl/transforms/DeadCodeElimination.scala b/src/main/scala/firrtl/transforms/DeadCodeElimination.scala
index a2f15776..308d68df 100644
--- a/src/main/scala/firrtl/transforms/DeadCodeElimination.scala
+++ b/src/main/scala/firrtl/transforms/DeadCodeElimination.scala
@@ -108,11 +108,11 @@ class DeadCodeElimination extends Transform with ResolvedAnnotationPaths with Re
         depGraph.addVertex(LogicNode(mod.name, name))
       case mem: DefMemory =>
         // Treat DefMems as a node with outputs depending on the node and node depending on inputs
-        // From perpsective of the module or instance, MALE expressions are inputs, FEMALE are outputs
-        val memRef = WRef(mem.name, MemPortUtils.memType(mem), ExpKind, FEMALE)
-        val exprs = Utils.create_exps(memRef).groupBy(Utils.gender(_))
-        val sources = exprs.getOrElse(MALE, List.empty).flatMap(getDeps(_))
-        val sinks = exprs.getOrElse(FEMALE, List.empty).flatMap(getDeps(_))
+        // From perpsective of the module or instance, SourceFlow expressions are inputs, SinkFlow are outputs
+        val memRef = WRef(mem.name, MemPortUtils.memType(mem), ExpKind, SinkFlow)
+        val exprs = Utils.create_exps(memRef).groupBy(Utils.flow(_))
+        val sources = exprs.getOrElse(SourceFlow, List.empty).flatMap(getDeps(_))
+        val sinks = exprs.getOrElse(SinkFlow, List.empty).flatMap(getDeps(_))
         val memNode = getDeps(memRef) match { case Seq(node) => node }
         depGraph.addVertex(memNode)
         sinks.foreach(sink => depGraph.addPairWithEdge(sink, memNode))
diff --git a/src/main/scala/firrtl/transforms/Dedup.scala b/src/main/scala/firrtl/transforms/Dedup.scala
index cd55a9a4..179ccbe4 100644
--- a/src/main/scala/firrtl/transforms/Dedup.scala
+++ b/src/main/scala/firrtl/transforms/Dedup.scala
@@ -439,7 +439,7 @@ object DedupModules {
     def rename(name: String): String = name
 
     def retype(name: String)(tpe: Type): Type = {
-      val exps = Utils.expandRef(WRef(name, tpe, ExpKind, UNKNOWNGENDER))
+      val exps = Utils.expandRef(WRef(name, tpe, ExpKind, UnknownFlow))
       refs ++= exps.map(Utils.toTarget(main, m.name))
       tpe
     }
@@ -465,7 +465,7 @@ object DedupModules {
       expr.tpe match {
         case _: GroundType =>
         case b: BundleType => b.fields.foreach { f => onExp(WSubField(expr, f.name, f.tpe)) }
-        case v: VectorType => (0 until v.size).foreach { i => onExp(WSubIndex(expr, i, v.tpe, UNKNOWNGENDER)) }
+        case v: VectorType => (0 until v.size).foreach { i => onExp(WSubIndex(expr, i, v.tpe, UnknownFlow)) }
       }
       all += expr
     }
diff --git a/src/main/scala/firrtl/transforms/GroupComponents.scala b/src/main/scala/firrtl/transforms/GroupComponents.scala
index 70ce37aa..c617e685 100644
--- a/src/main/scala/firrtl/transforms/GroupComponents.scala
+++ b/src/main/scala/firrtl/transforms/GroupComponents.scala
@@ -213,7 +213,7 @@ class GroupComponents extends firrtl.Transform {
             added += Connect(NoInfo, WSubField(WRef(label2instance(group)), toPort), otherExp)
 
             // Return WRef with new kind (its inside the group Module now)
-            WRef(toPort, otherExp.tpe, PortKind, MALE)
+            WRef(toPort, otherExp.tpe, PortKind, SourceFlow)
 
           // case 3: source in different group
           case otherGroup =>
@@ -227,7 +227,7 @@ class GroupComponents extends firrtl.Transform {
             added += Connect(NoInfo, WSubField(WRef(groupInst), toPort), WSubField(WRef(otherInst), fromPort))
 
             // Return WRef with new kind (its inside the group Module now)
-            WRef(toPort, otherExp.tpe, PortKind, MALE)
+            WRef(toPort, otherExp.tpe, PortKind, SourceFlow)
         }
     }
 
diff --git a/src/main/scala/firrtl/transforms/TopWiring.scala b/src/main/scala/firrtl/transforms/TopWiring.scala
index e884e02b..65281382 100644
--- a/src/main/scala/firrtl/transforms/TopWiring.scala
+++ b/src/main/scala/firrtl/transforms/TopWiring.scala
@@ -7,7 +7,7 @@ import firrtl.ir._
 import firrtl.passes.{Pass,
       InferTypes,
       ResolveKinds,
-      ResolveGenders,
+      ResolveFlows,
       ExpandConnects
       }
 import firrtl.annotations._
@@ -227,11 +227,11 @@ class TopWiringTransform extends Transform {
     val passes = Seq(
       InferTypes,
       ResolveKinds,
-      ResolveGenders,
+      ResolveFlows,
       ExpandConnects,
       InferTypes,
       ResolveKinds,
-      ResolveGenders
+      ResolveFlows
     )
     passes.foldLeft(circuit) { case (c: Circuit, p: Pass) => p.run(c) }
   }