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| author | Jack Koenig | 2020-08-15 10:16:28 -0700 |
|---|---|---|
| committer | GitHub | 2020-08-15 10:16:28 -0700 |
| commit | f1c314e6c7e116df33ffc215ec907212037292dc (patch) | |
| tree | f06060e9fb52f4f5b30bc56db78acb6bd371642d /src/main/scala/firrtl/transforms/RenameModules.scala | |
| parent | 2e5f942d25d7afab79ee1263c5d6833cad9d743d (diff) | |
| parent | 9adbe1ede59f9aeb25e71fd8318a4e7e46c4cc34 (diff) | |
Merge pull request #1852 from freechipsproject/format-src-4
Apply Scalafmt Rewriting
Diffstat (limited to 'src/main/scala/firrtl/transforms/RenameModules.scala')
| -rw-r--r-- | src/main/scala/firrtl/transforms/RenameModules.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/transforms/RenameModules.scala b/src/main/scala/firrtl/transforms/RenameModules.scala index d37f8c39..16fd655a 100644 --- a/src/main/scala/firrtl/transforms/RenameModules.scala +++ b/src/main/scala/firrtl/transforms/RenameModules.scala @@ -44,7 +44,7 @@ class RenameModules extends Transform with DependencyAPIMigration { moduleOrder.foreach(collectNameMapping(namespace.get, nameMappings)) val modulesx = state.circuit.modules.map { - case mod: Module => mod.mapStmt(onStmt(nameMappings)).mapString(nameMappings) + case mod: Module => mod.mapStmt(onStmt(nameMappings)).mapString(nameMappings) case ext: ExtModule => ext } |