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authorSchuyler Eldridge2020-04-21 22:41:23 -0400
committerSchuyler Eldridge2020-04-22 18:46:31 -0400
commit39d76a02785f4391b67abd3b7d7720d287736312 (patch)
treee820790206a46a315e0b2d5634c5a8c9825931a2 /src/main/scala/firrtl/transforms/RemoveWires.scala
parent1bf80040825e96ce04c15374304c144b9d48e902 (diff)
Mixin DependencyAPIMigration to all Transforms
This mixes in the new DependencyAPIMigration trait into all Transforms and Passes. This enables in-tree transforms/passes to build without deprecation warnings associated with the deprecated CircuitForm. As a consequence of this, every Transform now has UnknownForm as both its inputForm and outputForm. This PR modifies legacy Compiler and testing infrastructure to schedule transforms NOT using mergeTransforms/getLoweringTransforms (which rely on inputForm and outputForm not being UnknownForm), but instead using the Dependency API. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/transforms/RemoveWires.scala')
-rw-r--r--src/main/scala/firrtl/transforms/RemoveWires.scala10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/main/scala/firrtl/transforms/RemoveWires.scala b/src/main/scala/firrtl/transforms/RemoveWires.scala
index 5e6b7910..444df4b1 100644
--- a/src/main/scala/firrtl/transforms/RemoveWires.scala
+++ b/src/main/scala/firrtl/transforms/RemoveWires.scala
@@ -20,19 +20,17 @@ import scala.util.{Try, Success, Failure}
* wires have multiple connections that may be impossible to order in a
* flow-foward way
*/
-class RemoveWires extends Transform with PreservesAll[Transform] {
- def inputForm = LowForm
- def outputForm = LowForm
+class RemoveWires extends Transform with DependencyAPIMigration with PreservesAll[Transform] {
- override val prerequisites = firrtl.stage.Forms.MidForm ++
+ override def prerequisites = firrtl.stage.Forms.MidForm ++
Seq( Dependency(passes.LowerTypes),
Dependency(passes.Legalize),
Dependency(transforms.RemoveReset),
Dependency[transforms.CheckCombLoops] )
- override val optionalPrerequisites = Seq(Dependency[checks.CheckResets])
+ override def optionalPrerequisites = Seq(Dependency[checks.CheckResets])
- override val dependents = Seq.empty
+ override def dependents = Seq.empty
// Extract all expressions that are references to a Node, Wire, or Reg
// Since we are operating on LowForm, they can only be WRefs