Merge pull request #684 from freechipsproject/remove-wires

Remove wires, replacing them with nodes

1 files changed, 10 insertions, 5 deletions

diff --git a/src/main/scala/firrtl/transforms/ConstantPropagation.scala b/src/main/scala/firrtl/transforms/ConstantPropagation.scala
index 84b63e3d..ca48cbb5 100644
--- a/src/main/scala/firrtl/transforms/ConstantPropagation.scala
+++ b/src/main/scala/firrtl/transforms/ConstantPropagation.scala
@@ -16,15 +16,20 @@ import firrtl.analyses.InstanceGraph
 import annotation.tailrec
 import collection.mutable
 
-class ConstantPropagation extends Transform {
-  def inputForm = LowForm
-  def outputForm = LowForm
-
-  private def pad(e: Expression, t: Type) = (bitWidth(e.tpe), bitWidth(t)) match {
+object ConstantPropagation {
+  /** Pads e to the width of t */
+  def pad(e: Expression, t: Type) = (bitWidth(e.tpe), bitWidth(t)) match {
     case (we, wt) if we < wt => DoPrim(Pad, Seq(e), Seq(wt), t)
     case (we, wt) if we == wt => e
   }
 
+}
+
+class ConstantPropagation extends Transform {
+  import ConstantPropagation._
+  def inputForm = LowForm
+  def outputForm = LowForm
+
   private def asUInt(e: Expression, t: Type) = DoPrim(AsUInt, Seq(e), Seq(), t)
 
   trait FoldLogicalOp {