diff options
| author | chick | 2020-08-14 19:47:53 -0700 |
|---|---|---|
| committer | Jack Koenig | 2020-08-14 19:47:53 -0700 |
| commit | 6fc742bfaf5ee508a34189400a1a7dbffe3f1cac (patch) | |
| tree | 2ed103ee80b0fba613c88a66af854ae9952610ce /src/main/scala/firrtl/transforms/CombineCats.scala | |
| parent | b516293f703c4de86397862fee1897aded2ae140 (diff) | |
All of src/ formatted with scalafmt
Diffstat (limited to 'src/main/scala/firrtl/transforms/CombineCats.scala')
| -rw-r--r-- | src/main/scala/firrtl/transforms/CombineCats.scala | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/src/main/scala/firrtl/transforms/CombineCats.scala b/src/main/scala/firrtl/transforms/CombineCats.scala index 7fa01e46..3014d0e3 100644 --- a/src/main/scala/firrtl/transforms/CombineCats.scala +++ b/src/main/scala/firrtl/transforms/CombineCats.scala @@ -1,4 +1,3 @@ - package firrtl package transforms @@ -14,26 +13,30 @@ import scala.collection.mutable case class MaxCatLenAnnotation(maxCatLen: Int) extends NoTargetAnnotation object CombineCats { + /** Mapping from references to the [[firrtl.ir.Expression Expression]]s that drive them paired with their Cat length */ type Netlist = mutable.HashMap[WrappedExpression, (Int, Expression)] def expandCatArgs(maxCatLen: Int, netlist: Netlist)(expr: Expression): (Int, Expression) = expr match { - case cat@DoPrim(Cat, args, _, _) => + case cat @ DoPrim(Cat, args, _, _) => val (a0Len, a0Expanded) = expandCatArgs(maxCatLen - 1, netlist)(args.head) val (a1Len, a1Expanded) = expandCatArgs(maxCatLen - a0Len, netlist)(args(1)) (a0Len + a1Len, cat.copy(args = Seq(a0Expanded, a1Expanded)).asInstanceOf[Expression]) case other => - netlist.get(we(expr)).collect { - case (len, cat@DoPrim(Cat, _, _, _)) if maxCatLen >= len => expandCatArgs(maxCatLen, netlist)(cat) - }.getOrElse((1, other)) + netlist + .get(we(expr)) + .collect { + case (len, cat @ DoPrim(Cat, _, _, _)) if maxCatLen >= len => expandCatArgs(maxCatLen, netlist)(cat) + } + .getOrElse((1, other)) } def onStmt(maxCatLen: Int, netlist: Netlist)(stmt: Statement): Statement = { stmt.map(onStmt(maxCatLen, netlist)) match { - case node@DefNode(_, name, value) => + case node @ DefNode(_, name, value) => val catLenAndVal = value match { - case cat@DoPrim(Cat, _, _, _) => expandCatArgs(maxCatLen, netlist)(cat) - case other => (1, other) + case cat @ DoPrim(Cat, _, _, _) => expandCatArgs(maxCatLen, netlist)(cat) + case other => (1, other) } netlist(we(WRef(name))) = catLenAndVal node.copy(value = catLenAndVal._2) @@ -55,16 +58,16 @@ object CombineCats { class CombineCats extends Transform with DependencyAPIMigration { override def prerequisites = firrtl.stage.Forms.LowForm ++ - Seq( Dependency(passes.RemoveValidIf), - Dependency[firrtl.transforms.ConstantPropagation], - Dependency(firrtl.passes.memlib.VerilogMemDelays), - Dependency(firrtl.passes.SplitExpressions) ) + Seq( + Dependency(passes.RemoveValidIf), + Dependency[firrtl.transforms.ConstantPropagation], + Dependency(firrtl.passes.memlib.VerilogMemDelays), + Dependency(firrtl.passes.SplitExpressions) + ) override def optionalPrerequisites = Seq.empty - override def optionalPrerequisiteOf = Seq( - Dependency[SystemVerilogEmitter], - Dependency[VerilogEmitter] ) + override def optionalPrerequisiteOf = Seq(Dependency[SystemVerilogEmitter], Dependency[VerilogEmitter]) override def invalidates(a: Transform) = false |
