diff options
| author | Schuyler Eldridge | 2019-02-25 01:02:40 -0500 |
|---|---|---|
| committer | GitHub | 2019-02-25 01:02:40 -0500 |
| commit | a7a0cad04f912303624ec7905303d53d23abbf20 (patch) | |
| tree | bba1fd30561a6b6e4bc99cfa324b1dea94bc6866 /src/main/scala/firrtl/transforms/CheckCombLoops.scala | |
| parent | 5608aa8f42c1d69b59bee158d14fc6cef9b19a47 (diff) | |
| parent | 6de0075d799e59e5d23463b3848e848b0912fbc4 (diff) | |
Merge pull request #1032 from freechipsproject/fix-scaladoc-warnings
Fix almost all scaladoc warnings, add source links
Diffstat (limited to 'src/main/scala/firrtl/transforms/CheckCombLoops.scala')
| -rw-r--r-- | src/main/scala/firrtl/transforms/CheckCombLoops.scala | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/transforms/CheckCombLoops.scala b/src/main/scala/firrtl/transforms/CheckCombLoops.scala index 9016dca4..0a9ec0e3 100644 --- a/src/main/scala/firrtl/transforms/CheckCombLoops.scala +++ b/src/main/scala/firrtl/transforms/CheckCombLoops.scala @@ -53,10 +53,10 @@ case class CombinationalPath(sink: ComponentName, sources: Seq[ComponentName]) e } } -/** Finds and detects combinational logic loops in a circuit, if any - * exist. Returns the input circuit with no modifications. +/** Finds and detects combinational logic loops in a circuit, if any exist. Returns the input circuit with no + * modifications. * - * @throws CombLoopException if a loop is found + * @throws firrtl.transforms.CheckCombLoops.CombLoopException if a loop is found * @note Input form: Low FIRRTL * @note Output form: Low FIRRTL (identity transform) * @note The pass looks for loops through combinational-read memories |