use case object for WVoid, WInvalid

2 files changed, 8 insertions, 8 deletions

diff --git a/src/main/scala/firrtl/passes/CheckInitialization.scala b/src/main/scala/firrtl/passes/CheckInitialization.scala
index f90ee277..7d7f2f32 100644
--- a/src/main/scala/firrtl/passes/CheckInitialization.scala
+++ b/src/main/scala/firrtl/passes/CheckInitialization.scala
@@ -69,7 +69,7 @@ object CheckInitialization extends Pass {
         var void = false
         val voidDeps = collection.mutable.ArrayBuffer[Expression]()
         def hasVoid(e: Expression): Expression = e match {
-          case e: WVoid =>
+          case WVoid =>
             void = true
             e
           case (_: WRef | _: WSubField) =>
diff --git a/src/main/scala/firrtl/passes/ExpandWhens.scala b/src/main/scala/firrtl/passes/ExpandWhens.scala
index 6bd4bffd..deea3c0e 100644
--- a/src/main/scala/firrtl/passes/ExpandWhens.scala
+++ b/src/main/scala/firrtl/passes/ExpandWhens.scala
@@ -63,7 +63,7 @@ object ExpandWhens extends Pass {
   }
   private def expandNetlist(netlist: Netlist) =
     netlist map {
-      case (k, WInvalid()) => IsInvalid(NoInfo, k.e1)
+      case (k, WInvalid) => IsInvalid(NoInfo, k.e1)
       case (k, v) => Connect(NoInfo, k.e1, v)
     }
   // Searches nested scopes of defaults for lvalue
@@ -97,7 +97,7 @@ object ExpandWhens extends Pass {
                       p: Expression)
                       (s: Statement): Statement = s match {
         case w: DefWire =>
-          netlist ++= (getFemaleRefs(w.name, w.tpe, BIGENDER) map (ref => we(ref) -> WVoid()))
+          netlist ++= (getFemaleRefs(w.name, w.tpe, BIGENDER) map (ref => we(ref) -> WVoid))
           w
         case r: DefRegister =>
           netlist ++= (getFemaleRefs(r.name, r.tpe, BIGENDER) map (ref => we(ref) -> ref))
@@ -106,7 +106,7 @@ object ExpandWhens extends Pass {
           netlist(c.loc) = c.expr
           EmptyStmt
         case c: IsInvalid =>
-          netlist(c.expr) = WInvalid()
+          netlist(c.expr) = WInvalid
           EmptyStmt
         case s: Conditionally =>
           val conseqNetlist = new Netlist
@@ -127,9 +127,9 @@ object ExpandWhens extends Pass {
                 val trueValue = conseqNetlist getOrElse (lvalue, defaultValue)
                 val falseValue = altNetlist getOrElse (lvalue, defaultValue)
                 (trueValue, falseValue) match {
-                  case (WInvalid(), WInvalid()) => WInvalid()
-                  case (WInvalid(), fv) => ValidIf(NOT(s.pred), fv, fv.tpe)
-                  case (tv, WInvalid()) => ValidIf(s.pred, tv, tv.tpe)
+                  case (WInvalid, WInvalid) => WInvalid
+                  case (WInvalid, fv) => ValidIf(NOT(s.pred), fv, fv.tpe)
+                  case (tv, WInvalid) => ValidIf(s.pred, tv, tv.tpe)
                   case (tv, fv) => Mux(s.pred, tv, fv, mux_type_and_widths(tv, fv))
                 }
               case None =>
@@ -165,7 +165,7 @@ object ExpandWhens extends Pass {
       val netlist = new Netlist
       // Add ports to netlist
       netlist ++= (m.ports flatMap { case Port(_, name, dir, tpe) =>
-        getFemaleRefs(name, tpe, to_gender(dir)) map (ref => we(ref) -> WVoid())
+        getFemaleRefs(name, tpe, to_gender(dir)) map (ref => we(ref) -> WVoid)
       })
       (netlist, simlist, expandWhens(netlist, Seq(netlist), one)(m.body))
     }