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authorChick Markley2020-03-26 11:43:24 -0700
committerGitHub2020-03-26 18:43:24 +0000
commit249ed127cf6bf849f9895b8b603bececba1c5d76 (patch)
tree5313d130d40184dedf7c8b8e1608df5db2c74acd /src/main/scala/firrtl/passes
parent5b58936df09163ed3f0690bd66e46b307c2a9654 (diff)
Eliminate warnings on `sbt doc` and `sbt unidoc` (#1470)
* Eliminate warnings on `sbt doc` and `sbt unidoc` - removed toFirrtl reference on MultiTargetAnnotation - lots of places where package path has to be added to comment references - Change to use `/** text starts here` convention when wrong in comment with a doc fix. - Did not exhaustively change these - Wrestled doc example in RenderDiGraph#renderNode, not sure if I won - Cleaned up InferWidths & CatchExceptions imports - Added missing license message to a couple of files. - fixed a couple of stale parameter names in scaladoc - Added @unchecked to stop erasure warning in Emitting where emission annotations are collected - Change types to [_] on match in RenameMap#recordAll to fix erasure warning * Where possible change [[firrtl.ir.X]] to [[firrtl.ir.X X]] for better display in scaladoc Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Diffstat (limited to 'src/main/scala/firrtl/passes')
-rw-r--r--src/main/scala/firrtl/passes/InferWidths.scala12
-rw-r--r--src/main/scala/firrtl/passes/RemoveIntervals.scala4
2 files changed, 7 insertions, 9 deletions
diff --git a/src/main/scala/firrtl/passes/InferWidths.scala b/src/main/scala/firrtl/passes/InferWidths.scala
index 29936ca0..1e9657cf 100644
--- a/src/main/scala/firrtl/passes/InferWidths.scala
+++ b/src/main/scala/firrtl/passes/InferWidths.scala
@@ -3,16 +3,14 @@
package firrtl.passes
// Datastructures
-import firrtl._
-import firrtl.annotations.{Annotation, ReferenceTarget}
-import firrtl.ir._
-import firrtl.Utils._
-import firrtl.Mappers._
import firrtl.Implicits.width2constraint
-import firrtl.annotations.{CircuitTarget, ModuleTarget, ReferenceTarget, Target}
+import firrtl.Mappers._
+import firrtl.Utils._
+import firrtl._
+import firrtl.annotations._
import firrtl.constraint.{ConstraintSolver, IsMax}
+import firrtl.ir._
import firrtl.options.{Dependency, PreservesAll}
-import firrtl.traversals.Foreachers._
object InferWidths {
def apply(): InferWidths = new InferWidths()
diff --git a/src/main/scala/firrtl/passes/RemoveIntervals.scala b/src/main/scala/firrtl/passes/RemoveIntervals.scala
index cf3d2ff2..001c92b3 100644
--- a/src/main/scala/firrtl/passes/RemoveIntervals.scala
+++ b/src/main/scala/firrtl/passes/RemoveIntervals.scala
@@ -26,9 +26,9 @@ class WrapWithRemainder(info: Info, mname: String, wrap: DoPrim)
* 1) Align binary points
* - adds shift operators to primop args and connections
* - does not affect declaration- or inferred-types
- * 2) Replace Interval [[DefNode]] with [[DefWire]] + [[Connect]]
+ * 2) Replace Interval [[firrtl.ir.DefNode DefNode]] with [[firrtl.ir.DefWire DefWire]] + [[firrtl.ir.Connect Connect]]
* - You have to do this to capture the smaller bitwidths of nodes that intervals give you. Otherwise, any future
- * InferTypes would reinfer the larger widths on these nodes from SInt width inference rules
+ * InferTypes would re-infer the larger widths on these nodes from SInt width inference rules
* 3) Replace declaration IntervalType's with SIntType's
* - for each declaration:
* a. remove non-zero binary points