diff options
| author | Leway Colin | 2019-06-19 05:22:47 +0800 |
|---|---|---|
| committer | Adam Izraelevitz | 2019-06-18 14:22:47 -0700 |
| commit | fb4133cd76600cc8707e9a7b2f639cf120bd825c (patch) | |
| tree | 7532f341dc95f293fa02e4d015d1a6a0fac102ba /src/main/scala/firrtl/passes/memlib | |
| parent | d1d422670eb406567b2e34d7036a5cc0262309a1 (diff) | |
Use scalafix to remove unused import and deprecated procedure syntax (#1074)
* Add sbt-scalafix
* Add scalafix guide to README
* Remove Unused Import
* Remove deprecated procedure syntax
Diffstat (limited to 'src/main/scala/firrtl/passes/memlib')
11 files changed, 3 insertions, 21 deletions
diff --git a/src/main/scala/firrtl/passes/memlib/DecorateMems.scala b/src/main/scala/firrtl/passes/memlib/DecorateMems.scala index c5302a38..aa20e41e 100644 --- a/src/main/scala/firrtl/passes/memlib/DecorateMems.scala +++ b/src/main/scala/firrtl/passes/memlib/DecorateMems.scala @@ -3,7 +3,6 @@ package firrtl package passes package memlib -import ir._ import annotations._ import wiring._ diff --git a/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala b/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala index 0602e4f1..1663efaa 100644 --- a/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala +++ b/src/main/scala/firrtl/passes/memlib/InferReadWrite.scala @@ -13,7 +13,6 @@ import MemPortUtils.memPortField import firrtl.passes.memlib.AnalysisUtils.{Connects, getConnects, getOrigin} import WrappedExpression.weq import annotations._ -import scopt.OptionParser import firrtl.stage.RunFirrtlTransformAnnotation diff --git a/src/main/scala/firrtl/passes/memlib/MemConf.scala b/src/main/scala/firrtl/passes/memlib/MemConf.scala index 18fcbf37..75e6b910 100644 --- a/src/main/scala/firrtl/passes/memlib/MemConf.scala +++ b/src/main/scala/firrtl/passes/memlib/MemConf.scala @@ -3,7 +3,6 @@ package firrtl.passes package memlib -import scala.util.matching._ sealed abstract class MemPort(val name: String) { override def toString = name } diff --git a/src/main/scala/firrtl/passes/memlib/MemIR.scala b/src/main/scala/firrtl/passes/memlib/MemIR.scala index 41691a0a..aa60fca0 100644 --- a/src/main/scala/firrtl/passes/memlib/MemIR.scala +++ b/src/main/scala/firrtl/passes/memlib/MemIR.scala @@ -5,7 +5,6 @@ package memlib import firrtl._ import firrtl.ir._ -import Utils.indent object DefAnnotatedMemory { def apply(m: DefMemory): DefAnnotatedMemory = { diff --git a/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala b/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala index 4076d5d6..f0c9ebf4 100644 --- a/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala +++ b/src/main/scala/firrtl/passes/memlib/MemLibOptions.scala @@ -2,9 +2,7 @@ package firrtl.passes.memlib -import firrtl._ import firrtl.options.{RegisteredLibrary, ShellOption} -import scopt.OptionParser class MemLibOptions extends RegisteredLibrary { val name: String = "MemLib Options" diff --git a/src/main/scala/firrtl/passes/memlib/MemTransformUtils.scala b/src/main/scala/firrtl/passes/memlib/MemTransformUtils.scala index bf865f8f..e490c11a 100644 --- a/src/main/scala/firrtl/passes/memlib/MemTransformUtils.scala +++ b/src/main/scala/firrtl/passes/memlib/MemTransformUtils.scala @@ -5,9 +5,7 @@ package memlib import firrtl._ import firrtl.ir._ -import firrtl.Utils._ import firrtl.Mappers._ -import AnalysisUtils._ import MemPortUtils.{MemPortMap} object MemTransformUtils { diff --git a/src/main/scala/firrtl/passes/memlib/MemUtils.scala b/src/main/scala/firrtl/passes/memlib/MemUtils.scala index 9328dfe4..bf8b9401 100644 --- a/src/main/scala/firrtl/passes/memlib/MemUtils.scala +++ b/src/main/scala/firrtl/passes/memlib/MemUtils.scala @@ -5,7 +5,6 @@ package firrtl.passes import firrtl._ import firrtl.ir._ import firrtl.Utils._ -import firrtl.PrimOps._ /** Given a mask, return a bitmask corresponding to the desired datatype. * Requirements: diff --git a/src/main/scala/firrtl/passes/memlib/RenameAnnotatedMemoryPorts.scala b/src/main/scala/firrtl/passes/memlib/RenameAnnotatedMemoryPorts.scala index 9debff7a..c51a0adc 100644 --- a/src/main/scala/firrtl/passes/memlib/RenameAnnotatedMemoryPorts.scala +++ b/src/main/scala/firrtl/passes/memlib/RenameAnnotatedMemoryPorts.scala @@ -5,9 +5,7 @@ package memlib import firrtl._ import firrtl.ir._ -import firrtl.Utils._ import firrtl.Mappers._ -import AnalysisUtils._ import MemPortUtils._ import MemTransformUtils._ @@ -32,7 +30,7 @@ object RenameAnnotatedMemoryPorts extends Pass { * E.g.: * - ("m.read.addr") becomes (m.R0.addr) */ - def getMemPortMap(m: DefAnnotatedMemory, memPortMap: MemPortMap) { + def getMemPortMap(m: DefAnnotatedMemory, memPortMap: MemPortMap): Unit = { val defaultFields = Seq("addr", "en", "clk") val rFields = defaultFields :+ "data" val wFields = rFields :+ "mask" diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala index 42b7fb21..1b3e18b0 100644 --- a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala +++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala @@ -9,7 +9,6 @@ import firrtl.Utils._ import firrtl.Mappers._ import MemPortUtils.{MemPortMap, Modules} import MemTransformUtils._ -import AnalysisUtils._ import firrtl.annotations._ import wiring._ diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala index a9d0cc7c..6ccfd601 100644 --- a/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala +++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemTransform.scala @@ -4,14 +4,11 @@ package firrtl.passes package memlib import firrtl._ -import firrtl.ir._ import firrtl.annotations._ import firrtl.options.{HasShellOptions, ShellOption} -import AnalysisUtils._ import Utils.error import java.io.{File, CharArrayWriter, PrintWriter} import wiring._ -import scopt.OptionParser import firrtl.stage.RunFirrtlTransformAnnotation sealed trait PassOption diff --git a/src/main/scala/firrtl/passes/memlib/YamlUtils.scala b/src/main/scala/firrtl/passes/memlib/YamlUtils.scala index 3e0c6a44..eab1fe37 100644 --- a/src/main/scala/firrtl/passes/memlib/YamlUtils.scala +++ b/src/main/scala/firrtl/passes/memlib/YamlUtils.scala @@ -5,7 +5,6 @@ package memlib import net.jcazevedo.moultingyaml._ import java.io.{CharArrayWriter, File, PrintWriter} -import firrtl.Utils.error object CustomYAMLProtocol extends DefaultYamlProtocol { // bottom depends on top @@ -22,7 +21,6 @@ case class Config(pin: Pin, source: Source, top: Top) class YamlFileReader(file: String) { - import CustomYAMLProtocol._ def parse[A](implicit reader: YamlReader[A]) : Seq[A] = { if (new File(file).exists) { val yamlString = scala.io.Source.fromFile(file).getLines.mkString("\n") @@ -36,13 +34,12 @@ class YamlFileReader(file: String) { } class YamlFileWriter(file: String) { - import CustomYAMLProtocol._ val outputBuffer = new CharArrayWriter val separator = "--- \n" - def append(in: YamlValue) { + def append(in: YamlValue): Unit = { outputBuffer append s"$separator${in.prettyPrint}" } - def dump() { + def dump(): Unit = { val outputFile = new PrintWriter(file) outputFile write outputBuffer.toString outputFile.close() |
