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authorAdam Izraelevitz2016-11-15 08:27:48 -0800
committerGitHub2016-11-15 08:27:48 -0800
commitb60bf387d5127bf5f91d6d4698a747c566db794f (patch)
tree4387fc1175ca06284b1cdbcf14aaef309f444cb7 /src/main/scala/firrtl/passes/memlib
parenta029b9bbb339b9b9fb90959a0b0fbe1467fe4b18 (diff)
Fixed multi wiring (#368)
* Fixed multi wiring * Minor style changes
Diffstat (limited to 'src/main/scala/firrtl/passes/memlib')
-rw-r--r--src/main/scala/firrtl/passes/memlib/DecorateMems.scala16
-rw-r--r--src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala14
2 files changed, 16 insertions, 14 deletions
diff --git a/src/main/scala/firrtl/passes/memlib/DecorateMems.scala b/src/main/scala/firrtl/passes/memlib/DecorateMems.scala
index c706a3d9..d73fbc91 100644
--- a/src/main/scala/firrtl/passes/memlib/DecorateMems.scala
+++ b/src/main/scala/firrtl/passes/memlib/DecorateMems.scala
@@ -15,15 +15,13 @@ class CreateMemoryAnnotations(reader: Option[YamlFileReader]) extends Transform
case None => state
case Some(r) =>
import CustomYAMLProtocol._
- r.parse[Config] match {
- case Seq(config) =>
- val cN = CircuitName(state.circuit.main)
- val top = TopAnnotation(ModuleName(config.top.name, cN))
- val source = SourceAnnotation(ComponentName(config.source.name, ModuleName(config.source.module, cN)))
- val pin = PinAnnotation(cN, config.pin.name)
- state.copy(annotations = Some(AnnotationMap(Seq(top, source, pin))))
- case Nil => state
- case _ => error("Can only have one config in yaml file")
+ val configs = r.parse[Config]
+ val cN = CircuitName(state.circuit.main)
+ val (as, pins) = configs.foldLeft((Seq.empty[Annotation], Seq.empty[String])) { case ((annos, pins), config) =>
+ val top = TopAnnotation(ModuleName(config.top.name, cN), config.pin.name)
+ val source = SourceAnnotation(ComponentName(config.source.name, ModuleName(config.source.module, cN)), config.pin.name)
+ (annos ++ Seq(top, source), pins :+ config.pin.name)
}
+ state.copy(annotations = Some(AnnotationMap(as :+ PinAnnotation(cN, pins.toSeq))))
}
}
diff --git a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
index 8d2c7200..30196fad 100644
--- a/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
+++ b/src/main/scala/firrtl/passes/memlib/ReplaceMemMacros.scala
@@ -16,7 +16,7 @@ import wiring._
/** Annotates the name of the pin to add for WiringTransform
*/
-case class PinAnnotation(target: CircuitName, pin: String) extends Annotation with Loose with Unstable {
+case class PinAnnotation(target: CircuitName, pins: Seq[String]) extends Annotation with Loose with Unstable {
def transform = classOf[ReplaceMemMacros]
def duplicate(n: Named) = n match {
case n: CircuitName => this.copy(target = n)
@@ -218,15 +218,19 @@ class ReplaceMemMacros(writer: ConfWriter) extends Transform {
val modules = c.modules map updateMemMods(namespace, nameMap, memMods)
// print conf
writer.serialize()
- val pin = getMyAnnotations(state) match {
- case Nil => "pin"
+ val pins = getMyAnnotations(state) match {
+ case Nil => Nil
case Seq(p) => p match {
- case PinAnnotation(c, pin) => pin
+ case PinAnnotation(c, pins) => pins
case _ => error(s"Bad Annotation: ${p}")
}
case _ => throwInternalError
}
- val annos = memMods.collect { case m: ExtModule => SinkAnnotation(ModuleName(m.name, CircuitName(c.main)), pin) }
+ val annos = pins.foldLeft(Seq[Annotation]()) { (seq, pin) =>
+ seq ++ memMods.collect {
+ case m: ExtModule => SinkAnnotation(ModuleName(m.name, CircuitName(c.main)), pin)
+ }
+ }
CircuitState(c.copy(modules = modules ++ memMods), inputForm, Some(AnnotationMap(annos)))
}
}