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authorSchuyler Eldridge2020-06-19 01:11:15 -0400
committerSchuyler Eldridge2020-06-22 19:00:20 -0400
commitd66ff2357e59113ecf48c7d257edff429c4266e0 (patch)
tree30f5d068ea78caf172008f900e3d4fde7e20f6b0 /src/main/scala/firrtl/passes/ToWorkingIR.scala
parent2d1e074a67483c136d5f0ed86e8ecf1b8505bc10 (diff)
Convert PreservesAll to explicit invalidates=false
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/passes/ToWorkingIR.scala')
-rw-r--r--src/main/scala/firrtl/passes/ToWorkingIR.scala4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/passes/ToWorkingIR.scala b/src/main/scala/firrtl/passes/ToWorkingIR.scala
index 7da94be8..c271302a 100644
--- a/src/main/scala/firrtl/passes/ToWorkingIR.scala
+++ b/src/main/scala/firrtl/passes/ToWorkingIR.scala
@@ -1,10 +1,10 @@
package firrtl.passes
import firrtl.ir._
-import firrtl.options.PreservesAll
import firrtl.Transform
-object ToWorkingIR extends Pass with PreservesAll[Transform] {
+object ToWorkingIR extends Pass {
override def prerequisites = firrtl.stage.Forms.MinimalHighForm
+ override def invalidates(a: Transform) = false
def run(c:Circuit): Circuit = c
}