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authorSchuyler Eldridge2020-03-11 14:32:32 -0400
committerGitHub2020-03-11 14:32:32 -0400
commit026c18dd76d4e2121c7f6c582d15e4d5a3ab842b (patch)
tree0537dff3091db3da167c0fffc3388a5966c46204 /src/main/scala/firrtl/passes/Resolves.scala
parent646c91e71b8bfb1b0d0f22e81ca113147637ce71 (diff)
parentabf226471249a1cbb8de33d0c4bc8526f9aafa70 (diff)
Merge pull request #1123 from freechipsproject/dependency-api-2
- Use Dependency API for transform scheduling - Add tests that old order/behavior is preserved Or: "Now you're thinking with dependencies."
Diffstat (limited to 'src/main/scala/firrtl/passes/Resolves.scala')
-rw-r--r--src/main/scala/firrtl/passes/Resolves.scala20
1 files changed, 17 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/Resolves.scala b/src/main/scala/firrtl/passes/Resolves.scala
index 97cc4bb3..15750b76 100644
--- a/src/main/scala/firrtl/passes/Resolves.scala
+++ b/src/main/scala/firrtl/passes/Resolves.scala
@@ -5,9 +5,14 @@ package firrtl.passes
import firrtl._
import firrtl.ir._
import firrtl.Mappers._
+import firrtl.options.{Dependency, PreservesAll}
import Utils.throwInternalError
-object ResolveKinds extends Pass {
+
+object ResolveKinds extends Pass with PreservesAll[Transform] {
+
+ override val prerequisites = firrtl.stage.Forms.WorkingIR
+
type KindMap = collection.mutable.LinkedHashMap[String, Kind]
def find_port(kinds: KindMap)(p: Port): Port = {
@@ -45,7 +50,13 @@ object ResolveKinds extends Pass {
c copy (modules = c.modules map resolve_kinds)
}
-object ResolveFlows extends Pass {
+object ResolveFlows extends Pass with PreservesAll[Transform] {
+
+ override val prerequisites =
+ Seq( Dependency(passes.ResolveKinds),
+ Dependency(passes.InferTypes),
+ Dependency(passes.Uniquify) ) ++ firrtl.stage.Forms.WorkingIR
+
def resolve_e(g: Flow)(e: Expression): Expression = e match {
case ex: WRef => ex copy (flow = g)
case WSubField(exp, name, tpe, _) => WSubField(
@@ -88,7 +99,10 @@ object ResolveGenders extends Pass {
}
-object CInferMDir extends Pass {
+object CInferMDir extends Pass with PreservesAll[Transform] {
+
+ override val prerequisites = firrtl.stage.Forms.ChirrtlForm :+ Dependency(CInferTypes)
+
type MPortDirMap = collection.mutable.LinkedHashMap[String, MPortDir]
def infer_mdir_e(mports: MPortDirMap, dir: MPortDir)(e: Expression): Expression = e match {