diff options
| author | Donggyu Kim | 2016-09-07 14:58:15 -0700 |
|---|---|---|
| committer | Donggyu Kim | 2016-09-07 16:34:31 -0700 |
| commit | c532c27b81b278cc530ec69e39731b9b98bc294b (patch) | |
| tree | 46e89eaaa734bc41b169b9a594d678d2da6c5415 /src/main/scala/firrtl/passes/ReplaceSubAccess.scala | |
| parent | db584ed4cb31731e1561e447d5b3609f234fc8db (diff) | |
clean up miscs
Diffstat (limited to 'src/main/scala/firrtl/passes/ReplaceSubAccess.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/ReplaceSubAccess.scala | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/main/scala/firrtl/passes/ReplaceSubAccess.scala b/src/main/scala/firrtl/passes/ReplaceSubAccess.scala index 8e911a96..ce95be13 100644 --- a/src/main/scala/firrtl/passes/ReplaceSubAccess.scala +++ b/src/main/scala/firrtl/passes/ReplaceSubAccess.scala @@ -22,11 +22,6 @@ object ReplaceAccesses extends Pass { case e => e map onExp } - val newModules = c.modules map { - case m: ExtModule => m - case Module(i, n, ps, b) => Module(i, n, ps, onStmt(b)) - } - - Circuit(c.info, newModules, c.main) + c copy (modules = c.modules map (_ map onStmt)) } } |
