diff options
| author | Schuyler Eldridge | 2019-12-17 18:29:47 -0500 |
|---|---|---|
| committer | Schuyler Eldridge | 2020-03-11 14:01:31 -0400 |
| commit | abf226471249a1cbb8de33d0c4bc8526f9aafa70 (patch) | |
| tree | 0537dff3091db3da167c0fffc3388a5966c46204 /src/main/scala/firrtl/passes/RemoveValidIf.scala | |
| parent | 646c91e71b8bfb1b0d0f22e81ca113147637ce71 (diff) | |
Migrate to DependencyAPI
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/passes/RemoveValidIf.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/RemoveValidIf.scala | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/passes/RemoveValidIf.scala b/src/main/scala/firrtl/passes/RemoveValidIf.scala index 42eae7e5..3b5499ac 100644 --- a/src/main/scala/firrtl/passes/RemoveValidIf.scala +++ b/src/main/scala/firrtl/passes/RemoveValidIf.scala @@ -2,9 +2,11 @@ package firrtl package passes + import firrtl.Mappers._ import firrtl.ir._ import Utils.throwInternalError +import firrtl.options.Dependency /** Remove [[firrtl.ir.ValidIf ValidIf]] and replace [[firrtl.ir.IsInvalid IsInvalid]] with a connection to zero */ object RemoveValidIf extends Pass { @@ -27,6 +29,17 @@ object RemoveValidIf extends Pass { case other => throwInternalError(s"Unexpected type $other") } + override val prerequisites = firrtl.stage.Forms.LowForm + + override val dependents = + Seq( Dependency[SystemVerilogEmitter], + Dependency[VerilogEmitter] ) + + override def invalidates(a: Transform): Boolean = a match { + case Legalize | _: firrtl.transforms.ConstantPropagation => true + case _ => false + } + // Recursive. Removes ValidIfs private def onExp(e: Expression): Expression = { e map onExp match { |
