diff options
| author | Jack | 2016-05-09 17:18:17 -0700 |
|---|---|---|
| committer | Jack Koenig | 2016-06-10 16:32:18 -0700 |
| commit | cc59c92f76bcfd6c632e5029770e08bc9d0898f2 (patch) | |
| tree | d6a375198b9cf1f04cbffce2d48224c9a1034b5e /src/main/scala/firrtl/passes/Checks.scala | |
| parent | 8aea3b3e5db6794523a64a724e12599df0ab2ab7 (diff) | |
API Cleanup - Type
trait Type -> abstract class Type
case class ClockType() -> case object ClockType
case class UnknownType() -> case object UnknownType
Add GroundType and AggregateType
ClockType has width of IntWidth(1)
Diffstat (limited to 'src/main/scala/firrtl/passes/Checks.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/Checks.scala | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/Checks.scala b/src/main/scala/firrtl/passes/Checks.scala index f9e91f67..88ba6ab2 100644 --- a/src/main/scala/firrtl/passes/Checks.scala +++ b/src/main/scala/firrtl/passes/Checks.scala @@ -423,7 +423,7 @@ object CheckTypes extends Pass with LazyLogging { def bulk_equals (t1: Type, t2: Type, flip1: Flip, flip2: Flip): Boolean = { //;println_all(["Inside with t1:" t1 ",t2:" t2 ",f1:" flip1 ",f2:" flip2]) (t1,t2) match { - case (t1:ClockType,t2:ClockType) => flip1 == flip2 + case (ClockType, ClockType) => flip1 == flip2 case (t1:UIntType,t2:UIntType) => flip1 == flip2 case (t1:SIntType,t2:SIntType) => flip1 == flip2 case (t1:BundleType,t2:BundleType) => { @@ -450,14 +450,14 @@ object CheckTypes extends Pass with LazyLogging { case (s:DefRegister) => if (wt(s.tpe) != wt(tpe(s.init))) errors.append(new InvalidRegInit(s.info)) case (s:BulkConnect) => if (!bulk_equals(tpe(s.loc),tpe(s.exp),DEFAULT,DEFAULT) ) errors.append(new InvalidConnect(s.info, s.loc.serialize, s.exp.serialize)) case (s:Stop) => { - if (wt(tpe(s.clk)) != wt(ClockType()) ) errors.append(new ReqClk(s.info)) + if (wt(tpe(s.clk)) != wt(ClockType) ) errors.append(new ReqClk(s.info)) if (wt(tpe(s.en)) != wt(ut()) ) errors.append(new EnNotUInt(s.info)) } case (s:Print)=> { for (x <- s.args ) { if (wt(tpe(x)) != wt(ut()) && wt(tpe(x)) != wt(st()) ) errors.append(new PrintfArgNotGround(s.info)) } - if (wt(tpe(s.clk)) != wt(ClockType()) ) errors.append(new ReqClk(s.info)) + if (wt(tpe(s.clk)) != wt(ClockType) ) errors.append(new ReqClk(s.info)) if (wt(tpe(s.en)) != wt(ut()) ) errors.append(new EnNotUInt(s.info)) } case (s:Conditionally) => if (wt(tpe(s.pred)) != wt(ut()) ) errors.append(new PredNotUInt(s.info)) |