Move CheckWidths to its own file

1 files changed, 0 insertions, 94 deletions

diff --git a/src/main/scala/firrtl/passes/Checks.scala b/src/main/scala/firrtl/passes/Checks.scala
index 1fe6f8ad..9be92f85 100644
--- a/src/main/scala/firrtl/passes/Checks.scala
+++ b/src/main/scala/firrtl/passes/Checks.scala
@@ -570,97 +570,3 @@ object CheckGenders extends Pass {
     c
   }
 }
-
-object CheckWidths extends Pass {
-  def name = "Width Check"
-  class UninferredWidth (info: Info, mname: String) extends PassException(
-    s"$info : [module $mname]  Uninferred width.")
-  class WidthTooSmall(info: Info, mname: String, b: BigInt) extends PassException(
-    s"$info : [module $mname]  Width too small for constant ${serialize(b)}.")
-  class WidthTooBig(info: Info, mname: String) extends PassException(
-    s"$info : [module $mname]  Width of dshl shift amount cannot be larger than 31 bits.")
-  class NegWidthException(info:Info, mname: String) extends PassException(
-    s"$info: [module $mname] Width cannot be negative or zero.")
-  class BitsWidthException(info: Info, mname: String, hi: BigInt, width: BigInt) extends PassException(
-    s"$info: [module $mname] High bit $hi in bits operator is larger than input width $width.")
-  class HeadWidthException(info: Info, mname: String, n: BigInt, width: BigInt) extends PassException(
-    s"$info: [module $mname] Parameter $n in head operator is larger than input width $width.")
-  class TailWidthException(info: Info, mname: String, n: BigInt, width: BigInt) extends PassException(
-    s"$info: [module $mname] Parameter $n in tail operator is larger than input width $width.")
-  class AttachWidthsNotEqual(info: Info, mname: String, eName: String, source: String) extends PassException(
-    s"$info: [module $mname] Attach source $source and expression $eName must have identical widths.")
-
-  def run(c: Circuit): Circuit = {
-    val errors = new Errors()
-
-    def check_width_w(info: Info, mname: String)(w: Width): Width = {
-      w match {
-        case w: IntWidth if w.width >= 0 =>
-        case _: IntWidth =>
-          errors append new NegWidthException(info, mname)
-        case _ =>
-          errors append new UninferredWidth(info, mname)
-      }
-      w
-    }
-
-    def hasWidth(tpe: Type): Boolean = tpe match {
-      case GroundType(IntWidth(w)) => true
-      case GroundType(_) => false
-      case _ => println(tpe); throwInternalError
-    }
-
-    def check_width_t(info: Info, mname: String)(t: Type): Type =
-      t map check_width_t(info, mname) map check_width_w(info, mname)
-
-    def check_width_e(info: Info, mname: String)(e: Expression): Expression = {
-      e match {
-        case e: UIntLiteral => e.width match {
-          case w: IntWidth if math.max(1, e.value.bitLength) > w.width =>
-            errors append new WidthTooSmall(info, mname, e.value)
-          case _ =>
-        }
-        case e: SIntLiteral => e.width match {
-          case w: IntWidth if e.value.bitLength + 1 > w.width =>
-            errors append new WidthTooSmall(info, mname, e.value)
-          case _ =>
-        }
-        case DoPrim(Bits, Seq(a), Seq(hi, lo), _) if (hasWidth(a.tpe) && bitWidth(a.tpe) <= hi) =>
-          errors append new BitsWidthException(info, mname, hi, bitWidth(a.tpe))
-        case DoPrim(Head, Seq(a), Seq(n), _) if (hasWidth(a.tpe) && bitWidth(a.tpe) < n) =>
-          errors append new HeadWidthException(info, mname, n, bitWidth(a.tpe))
-        case DoPrim(Tail, Seq(a), Seq(n), _) if (hasWidth(a.tpe) && bitWidth(a.tpe) <= n) =>
-          errors append new TailWidthException(info, mname, n, bitWidth(a.tpe))
-        case DoPrim(Dshl, Seq(a, b), _, _) if (hasWidth(a.tpe) && bitWidth(b.tpe) >= BigInt(32)) =>
-          errors append new WidthTooBig(info, mname)
-        case _ =>
-      }
-      //e map check_width_t(info, mname) map check_width_e(info, mname)
-      e map check_width_e(info, mname)
-    }
-
-
-    def check_width_s(minfo: Info, mname: String)(s: Statement): Statement = {
-      val info = get_info(s) match { case NoInfo => minfo case x => x }
-      s map check_width_e(info, mname) map check_width_s(info, mname) map check_width_t(info, mname) match {
-        case Attach(infox, source, exprs) => 
-          exprs foreach ( e =>
-            if (bitWidth(e.tpe) != bitWidth(source.tpe))
-              errors append new AttachWidthsNotEqual(infox, mname, e.serialize, source.serialize)
-          )
-          s
-        case _ => s
-      } 
-    }
-
-    def check_width_p(minfo: Info, mname: String)(p: Port): Port = p.copy(tpe =  check_width_t(p.info, mname)(p.tpe))
-
-    def check_width_m(m: DefModule) {
-      m map check_width_p(m.info, m.name) map check_width_s(m.info, m.name)
-    }
-
-    c.modules foreach check_width_m
-    errors.trigger()
-    c
-  }
-}