diff options
| author | Schuyler Eldridge | 2020-04-21 23:24:44 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2020-04-22 19:58:54 -0400 |
| commit | ffa6958535292d636923739d9d77b566054e2208 (patch) | |
| tree | 607b55e30774227895c75b60fb8fd67845ed23a8 /src/main/scala/firrtl/passes/CheckWidths.scala | |
| parent | 26e1eec14cdb71cd2dccc510c7f4eaea171be7c4 (diff) | |
s/dependents/optionalPrerequisiteOf/
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/passes/CheckWidths.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/CheckWidths.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/passes/CheckWidths.scala b/src/main/scala/firrtl/passes/CheckWidths.scala index 6761bc7d..3c7ad0a8 100644 --- a/src/main/scala/firrtl/passes/CheckWidths.scala +++ b/src/main/scala/firrtl/passes/CheckWidths.scala @@ -15,7 +15,7 @@ object CheckWidths extends Pass with PreservesAll[Transform] { override def prerequisites = Dependency[passes.InferWidths] +: firrtl.stage.Forms.WorkingIR - override def dependents = Seq(Dependency[transforms.InferResets]) + override def optionalPrerequisiteOf = Seq(Dependency[transforms.InferResets]) /** The maximum allowed width for any circuit element */ val MaxWidth = 1000000 |