aboutsummaryrefslogtreecommitdiff
path: root/src/main/scala/firrtl/passes/CheckInitialization.scala
diff options
context:
space:
mode:
authorSchuyler Eldridge2019-09-16 19:03:37 -0400
committerGitHub2019-09-16 19:03:37 -0400
commitf93e1d240f80848dc12c25906239fe6c8a4d42b5 (patch)
tree9b39634fc4bd5044e37939a0bd568ae4ed158826 /src/main/scala/firrtl/passes/CheckInitialization.scala
parent7e39ea8ec948ff1db7ccd0d850923a86d2d8a4e7 (diff)
parentb3dd7924f27342083681be6dd5932ef95d354029 (diff)
Merge pull request #1124 from freechipsproject/gender-to-flow
Gender to Flow
Diffstat (limited to 'src/main/scala/firrtl/passes/CheckInitialization.scala')
-rw-r--r--src/main/scala/firrtl/passes/CheckInitialization.scala6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/CheckInitialization.scala b/src/main/scala/firrtl/passes/CheckInitialization.scala
index d1b6a03f..9fbf3eeb 100644
--- a/src/main/scala/firrtl/passes/CheckInitialization.scala
+++ b/src/main/scala/firrtl/passes/CheckInitialization.scala
@@ -18,14 +18,14 @@ object CheckInitialization extends Pass {
private case class VoidExpr(stmt: Statement, voidDeps: Seq[Expression])
class RefNotInitializedException(info: Info, mname: String, name: String, trace: Seq[Statement]) extends PassException(
- s"$info : [module $mname] Reference $name is not fully initialized.\n" +
+ s"$info : [module $mname] Reference $name is not fully initialized.\n" +
trace.map(s => s" ${get_info(s)} : ${s.serialize}").mkString("\n")
)
private def getTrace(expr: WrappedExpression, voidExprs: Map[WrappedExpression, VoidExpr]): Seq[Statement] = {
@tailrec
def rec(e: WrappedExpression, map: Map[WrappedExpression, VoidExpr], trace: Seq[Statement]): Seq[Statement] = {
- val voidExpr = map(e)
+ val voidExpr = map(e)
val newTrace = voidExpr.stmt +: trace
if (voidExpr.voidDeps.nonEmpty) rec(voidExpr.voidDeps.head, map, newTrace) else newTrace
}
@@ -62,7 +62,7 @@ object CheckInitialization extends Pass {
case node: DefNode =>
val (hasVoid, voidDeps) = hasVoidExpr(node.value)
if (hasVoid) {
- val nodeRef = WRef(node.name, node.value.tpe, NodeKind, MALE)
+ val nodeRef = WRef(node.name, node.value.tpe, NodeKind, SourceFlow)
voidExprs(nodeRef) = VoidExpr(node, voidDeps)
}
case sx => sx.foreach(checkInitS)