diff options
| author | Schuyler Eldridge | 2019-07-17 14:08:33 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2019-09-16 17:12:51 -0400 |
| commit | a594ccef986c4567730fee729bdea9ed9aefed38 (patch) | |
| tree | 2512913e054ea7d56867f2c73912ff4be17f1e82 /src/main/scala/firrtl/passes/CheckInitialization.scala | |
| parent | 7e39ea8ec948ff1db7ccd0d850923a86d2d8a4e7 (diff) | |
Rename gender to flow
The following names are changed:
- gender -> flow
- Gender -> Flow
- MALE -> SourceFlow
- FEMALE -> SinkFlow
- BIGENDER -> DuplexFlow
- UNKNOWNGENDER -> UnknownFlow
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Diffstat (limited to 'src/main/scala/firrtl/passes/CheckInitialization.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/CheckInitialization.scala | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/main/scala/firrtl/passes/CheckInitialization.scala b/src/main/scala/firrtl/passes/CheckInitialization.scala index d1b6a03f..9fbf3eeb 100644 --- a/src/main/scala/firrtl/passes/CheckInitialization.scala +++ b/src/main/scala/firrtl/passes/CheckInitialization.scala @@ -18,14 +18,14 @@ object CheckInitialization extends Pass { private case class VoidExpr(stmt: Statement, voidDeps: Seq[Expression]) class RefNotInitializedException(info: Info, mname: String, name: String, trace: Seq[Statement]) extends PassException( - s"$info : [module $mname] Reference $name is not fully initialized.\n" + + s"$info : [module $mname] Reference $name is not fully initialized.\n" + trace.map(s => s" ${get_info(s)} : ${s.serialize}").mkString("\n") ) private def getTrace(expr: WrappedExpression, voidExprs: Map[WrappedExpression, VoidExpr]): Seq[Statement] = { @tailrec def rec(e: WrappedExpression, map: Map[WrappedExpression, VoidExpr], trace: Seq[Statement]): Seq[Statement] = { - val voidExpr = map(e) + val voidExpr = map(e) val newTrace = voidExpr.stmt +: trace if (voidExpr.voidDeps.nonEmpty) rec(voidExpr.voidDeps.head, map, newTrace) else newTrace } @@ -62,7 +62,7 @@ object CheckInitialization extends Pass { case node: DefNode => val (hasVoid, voidDeps) = hasVoidExpr(node.value) if (hasVoid) { - val nodeRef = WRef(node.name, node.value.tpe, NodeKind, MALE) + val nodeRef = WRef(node.name, node.value.tpe, NodeKind, SourceFlow) voidExprs(nodeRef) = VoidExpr(node, voidDeps) } case sx => sx.foreach(checkInitS) |