diff options
| author | Schuyler Eldridge | 2020-06-22 19:47:24 -0400 |
|---|---|---|
| committer | GitHub | 2020-06-22 19:47:24 -0400 |
| commit | 8c9d8f68e038cd9e245dd66580af962267024de0 (patch) | |
| tree | 30f5d068ea78caf172008f900e3d4fde7e20f6b0 /src/main/scala/firrtl/passes/CheckInitialization.scala | |
| parent | a845a11458fb0feed337d416ff45a503c7771bb3 (diff) | |
| parent | d66ff2357e59113ecf48c7d257edff429c4266e0 (diff) | |
Merge pull request #1700 from freechipsproject/deprecate-PreservesAll
Deprecate PreservesAll Trait, Remove Usages
Diffstat (limited to 'src/main/scala/firrtl/passes/CheckInitialization.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/CheckInitialization.scala | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/passes/CheckInitialization.scala b/src/main/scala/firrtl/passes/CheckInitialization.scala index fe0ff450..1eb16a9b 100644 --- a/src/main/scala/firrtl/passes/CheckInitialization.scala +++ b/src/main/scala/firrtl/passes/CheckInitialization.scala @@ -6,7 +6,6 @@ import firrtl._ import firrtl.ir._ import firrtl.Utils._ import firrtl.traversals.Foreachers._ -import firrtl.options.PreservesAll import annotation.tailrec @@ -15,10 +14,12 @@ import annotation.tailrec * @note This pass looks for [[firrtl.WVoid]]s left behind by [[ExpandWhens]] * @note Assumes single connection (ie. no last connect semantics) */ -object CheckInitialization extends Pass with PreservesAll[Transform] { +object CheckInitialization extends Pass { override def prerequisites = firrtl.stage.Forms.Resolved + override def invalidates(a: Transform) = false + private case class VoidExpr(stmt: Statement, voidDeps: Seq[Expression]) class RefNotInitializedException(info: Info, mname: String, name: String, trace: Seq[Statement]) extends PassException( |
