diff options
| author | chick | 2016-09-22 10:05:33 -0700 |
|---|---|---|
| committer | jackkoenig | 2016-09-23 13:38:50 -0700 |
| commit | 2e009694159ccae82f2c01513bbdf7e7d9a370ef (patch) | |
| tree | 7de71975f3bee6bee8f9200267a735773027985e /src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala | |
| parent | f38d60089a1961507ec317ac0faffa3affa93eb9 (diff) | |
use .isEmpty, .nonEmpty, isDefined
Diffstat (limited to 'src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala b/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala index f80d4a0c..4f55722b 100644 --- a/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala +++ b/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala @@ -39,7 +39,7 @@ case class MemDimension( rules: Option[DimensionRules], set: Option[List[Int]]) { require ( - if (rules == None) set != None else set == None, + if (rules.isEmpty) set.isDefined else set.isEmpty, "Should specify either rules or a list of valid options, but not both" ) def getValid = set.getOrElse(rules.get.getValid).sorted @@ -120,7 +120,7 @@ case class SRAMCompiler( fillWMask: Boolean) { require(portType == "RW" || portType == "R,W", "Memory must be single port RW or dual port R,W") require( - (configFile != None && configPattern != None && wMaskArg != None) || configFile == None, + (configFile.isDefined && configPattern.isDefined && wMaskArg.isDefined) || configFile.isEmpty, "Config pattern must be provided with config file" ) def ymuxVals = rules.map(_.ymux._1).sortWith(_ < _) |