diff options
| author | Chick Markley | 2016-10-11 15:53:40 -0700 |
|---|---|---|
| committer | Adam Izraelevitz | 2016-10-11 15:53:40 -0700 |
| commit | 2848d87721df110d0425114283cb5fa7e6c2ee03 (patch) | |
| tree | d76dd381fb77d63b8509a69063ace380f3209f33 /src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala | |
| parent | 515f29f5993abb399db43b04e9a63c0fdf347ecc (diff) | |
Scala style cleanup take 5 (#324)
* working through variable shrouding
* working through variable shrouding
* working through variable shadowing
* working through variable shadowing
hmm there are some very fragile match {} in Passes
* working through variable shadowing
hmm there are some very fragile match {} in Passes
* working through variable shadowing
* working through variable shadowing
* working through variable shadowing
* working through variable shadowing
* working through variable shadowing
* working through variable shadowing
* working through variable shadowing
* working through variable shadowing
* Fixes suggested by Adam
Diffstat (limited to 'src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala')
| -rw-r--r-- | src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala b/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala index 8d595f91..b5149953 100644 --- a/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala +++ b/src/main/scala/firrtl/passes/AnnotateValidMemConfigs.scala @@ -281,7 +281,7 @@ class AnnotateValidMemConfigs(reader: Option[YamlFileReader]) extends Pass { case Some(p) => p append m } } - case s => s map updateStmts + case sx => sx map updateStmts } def run(c: Circuit) = c copy (modules = c.modules map (_ map updateStmts)) |