diff options
| author | Jack Koenig | 2019-02-14 15:08:35 -0800 |
|---|---|---|
| committer | GitHub | 2019-02-14 15:08:35 -0800 |
| commit | 2272044c6ab46b5148c39c124e66e1a8e9073a24 (patch) | |
| tree | 83ad2141b1a3c54707dd9b33073f9217b0ae16c8 /src/main/scala/firrtl/ir | |
| parent | d487b4cb6726e7e8d1a18f894021652594125221 (diff) | |
Asynchronous Reset (#1011)
Fixes #219
* Adds AsyncResetType (similar to ClockType)
* Registers with reset signal of type AsyncResetType are async reset
registers
* Registers with async reset can only be reset to literal values
* Add initialization logic for async reset registers
Diffstat (limited to 'src/main/scala/firrtl/ir')
| -rw-r--r-- | src/main/scala/firrtl/ir/IR.scala | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/ir/IR.scala b/src/main/scala/firrtl/ir/IR.scala index 4f647c0c..4c00bdd1 100644 --- a/src/main/scala/firrtl/ir/IR.scala +++ b/src/main/scala/firrtl/ir/IR.scala @@ -591,6 +591,12 @@ case object ClockType extends GroundType { def mapWidth(f: Width => Width): Type = this def foreachWidth(f: Width => Unit): Unit = Unit } +case object AsyncResetType extends GroundType { + val width = IntWidth(1) + def serialize: String = "AsyncReset" + def mapWidth(f: Width => Width): Type = this + def foreachWidth(f: Width => Unit): Unit = Unit +} case class AnalogType(width: Width) extends GroundType { def serialize: String = "Analog" + width.serialize def mapWidth(f: Width => Width): Type = AnalogType(f(width)) |
