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authorAdam Izraelevitz2016-08-02 16:02:57 -0700
committerGitHub2016-08-02 16:02:57 -0700
commitfec6e45c5b52e4aa7fb0ec596bfc2c6d43cc21fa (patch)
tree397d70fe49249e15bdba58ab50198c23694435c7 /src/main/scala/firrtl/ir/IR.scala
parentdc7a1470e1a64643c387e328030059735d8d2c4c (diff)
parent1a5293bc5fcd01f79afa6b4a03117fd5677f8fcd (diff)
Merge pull request #215 from ucb-bar/new-serialize
Change serialize to abstract method on FirrtlNode
Diffstat (limited to 'src/main/scala/firrtl/ir/IR.scala')
-rw-r--r--src/main/scala/firrtl/ir/IR.scala207
1 files changed, 161 insertions, 46 deletions
diff --git a/src/main/scala/firrtl/ir/IR.scala b/src/main/scala/firrtl/ir/IR.scala
index fc5e26b8..76c7c91e 100644
--- a/src/main/scala/firrtl/ir/IR.scala
+++ b/src/main/scala/firrtl/ir/IR.scala
@@ -28,17 +28,22 @@ MODIFICATIONS.
package firrtl
package ir
-trait Info
-case object NoInfo extends Info {
- override def toString(): String = ""
-}
-case class FileInfo(info: StringLit) extends Info {
- override def toString(): String = " @[" + info.serialize + "]"
-}
+import Utils.indent
/** Intermediate Representation */
abstract class FirrtlNode {
- def serialize: String = firrtl.Serialize.serialize(this)
+ def serialize: String
+}
+
+abstract class Info extends FirrtlNode {
+ // default implementation
+ def serialize: String = this.toString
+}
+case object NoInfo extends Info {
+ override def toString: String = ""
+}
+case class FileInfo(info: StringLit) extends Info {
+ override def toString: String = " @[" + info.serialize + "]"
}
trait HasName {
@@ -49,45 +54,75 @@ trait HasInfo {
}
trait IsDeclaration extends HasName with HasInfo
-case class StringLit(array: Array[Byte]) extends FirrtlNode
+case class StringLit(array: Array[Byte]) extends FirrtlNode {
+ def serialize: String = FIRRTLStringLitHandler.escape(this)
+}
/** Primitive Operation
*
* See [[PrimOps]]
*/
-abstract class PrimOp extends FirrtlNode
+abstract class PrimOp extends FirrtlNode {
+ def serialize: String = this.toString
+}
abstract class Expression extends FirrtlNode {
def tpe: Type
}
-case class Reference(name: String, tpe: Type) extends Expression with HasName
-case class SubField(expr: Expression, name: String, tpe: Type) extends Expression with HasName
-case class SubIndex(expr: Expression, value: Int, tpe: Type) extends Expression
-case class SubAccess(expr: Expression, index: Expression, tpe: Type) extends Expression
-case class Mux(cond: Expression, tval: Expression, fval: Expression, tpe: Type) extends Expression
-case class ValidIf(cond: Expression, value: Expression, tpe: Type) extends Expression
+case class Reference(name: String, tpe: Type) extends Expression with HasName {
+ def serialize: String = name
+}
+case class SubField(expr: Expression, name: String, tpe: Type) extends Expression with HasName {
+ def serialize: String = s"${expr.serialize}.$name"
+}
+case class SubIndex(expr: Expression, value: Int, tpe: Type) extends Expression {
+ def serialize: String = s"${expr.serialize}[$value]"
+}
+case class SubAccess(expr: Expression, index: Expression, tpe: Type) extends Expression {
+ def serialize: String = s"${expr.serialize}[${index.serialize}]"
+}
+case class Mux(cond: Expression, tval: Expression, fval: Expression, tpe: Type) extends Expression {
+ def serialize: String = s"mux(${cond.serialize}, ${tval.serialize}, ${fval.serialize})"
+}
+case class ValidIf(cond: Expression, value: Expression, tpe: Type) extends Expression {
+ def serialize: String = s"validif(${cond.serialize}, ${value.serialize})"
+}
abstract class Literal extends Expression {
val value: BigInt
val width: Width
}
case class UIntLiteral(value: BigInt, width: Width) extends Literal {
def tpe = UIntType(width)
+ def serialize = s"UInt${width.serialize}(" + Utils.serialize(value) + ")"
}
case class SIntLiteral(value: BigInt, width: Width) extends Literal {
def tpe = SIntType(width)
+ def serialize = s"SInt${width.serialize}(" + Utils.serialize(value) + ")"
+}
+case class DoPrim(op: PrimOp, args: Seq[Expression], consts: Seq[BigInt], tpe: Type) extends Expression {
+ def serialize: String = op.serialize + "(" +
+ (args.map(_.serialize) ++ consts.map(_.toString)).mkString(", ") + ")"
}
-case class DoPrim(op: PrimOp, args: Seq[Expression], consts: Seq[BigInt], tpe: Type) extends Expression
abstract class Statement extends FirrtlNode
-case class DefWire(info: Info, name: String, tpe: Type) extends Statement with IsDeclaration
+case class DefWire(info: Info, name: String, tpe: Type) extends Statement with IsDeclaration {
+ def serialize: String = s"wire $name : ${tpe.serialize}" + info.serialize
+}
case class DefRegister(
info: Info,
name: String,
tpe: Type,
clock: Expression,
reset: Expression,
- init: Expression) extends Statement with IsDeclaration
-case class DefInstance(info: Info, name: String, module: String) extends Statement with IsDeclaration
+ init: Expression) extends Statement with IsDeclaration {
+ def serialize: String =
+ s"reg $name : ${tpe.serialize}, ${clock.serialize} with :" +
+ indent("\n" + s"reset => (${reset.serialize}, ${init.serialize})" + info.serialize)
+
+}
+case class DefInstance(info: Info, name: String, module: String) extends Statement with IsDeclaration {
+ def serialize: String = s"inst $name of $module" + info.serialize
+}
case class DefMemory(
info: Info,
name: String,
@@ -99,25 +134,63 @@ case class DefMemory(
writers: Seq[String],
readwriters: Seq[String],
// TODO: handle read-under-write
- readUnderWrite: Option[String] = None) extends Statement with IsDeclaration
-case class DefNode(info: Info, name: String, value: Expression) extends Statement with IsDeclaration
+ readUnderWrite: Option[String] = None) extends Statement with IsDeclaration {
+ def serialize: String =
+ s"mem $name :" + info.serialize +
+ indent(
+ Seq("\ndata-type => " + dataType.serialize,
+ "depth => " + depth,
+ "read-latency => " + readLatency,
+ "write-latency => " + writeLatency,
+ readers map ("reader => " + _),
+ writers map ("writer => " + _),
+ readwriters map ("readwriter" + _),
+ "read-under-write => undefined") mkString "\n")
+}
+case class DefNode(info: Info, name: String, value: Expression) extends Statement with IsDeclaration {
+ def serialize: String = s"node $name = ${value.serialize}" + info.serialize
+}
case class Conditionally(
info: Info,
pred: Expression,
conseq: Statement,
- alt: Statement) extends Statement with HasInfo
-case class Block(stmts: Seq[Statement]) extends Statement
-case class PartialConnect(info: Info, loc: Expression, expr: Expression) extends Statement with HasInfo
-case class Connect(info: Info, loc: Expression, expr: Expression) extends Statement with HasInfo
-case class IsInvalid(info: Info, expr: Expression) extends Statement with HasInfo
-case class Stop(info: Info, ret: Int, clk: Expression, en: Expression) extends Statement with HasInfo
+ alt: Statement) extends Statement with HasInfo {
+ def serialize: String =
+ s"when ${pred.serialize} :" + info.serialize +
+ indent("\n" + conseq.serialize) +
+ (if (alt == EmptyStmt) ""
+ else "\nelse :" + indent("\n" + alt.serialize))
+}
+case class Block(stmts: Seq[Statement]) extends Statement {
+ def serialize: String = stmts map (_.serialize) mkString "\n"
+}
+case class PartialConnect(info: Info, loc: Expression, expr: Expression) extends Statement with HasInfo {
+ def serialize: String = s"${loc.serialize} <- ${expr.serialize}" + info.serialize
+}
+case class Connect(info: Info, loc: Expression, expr: Expression) extends Statement with HasInfo {
+ def serialize: String = s"${loc.serialize} <= ${expr.serialize}" + info.serialize
+}
+case class IsInvalid(info: Info, expr: Expression) extends Statement with HasInfo {
+ def serialize: String = s"${expr.serialize} is invalid" + info.serialize
+}
+case class Stop(info: Info, ret: Int, clk: Expression, en: Expression) extends Statement with HasInfo {
+ def serialize: String = s"stop(${clk.serialize}, ${en.serialize}, $ret)" + info.serialize
+}
case class Print(
info: Info,
string: StringLit,
args: Seq[Expression],
clk: Expression,
- en: Expression) extends Statement with HasInfo
-case object EmptyStmt extends Statement
+ en: Expression) extends Statement with HasInfo {
+ def serialize: String = {
+ val strs = Seq(clk.serialize, en.serialize, ("\"" + string.serialize + "\"")) ++
+ (args map (_.serialize))
+ "printf(" + (strs mkString ", ") + ")" + info.serialize
+ }
+}
+case object EmptyStmt extends Statement {
+ def serialize: String = "skip"
+}
abstract class Width extends FirrtlNode {
def +(x: Width): Width = (this, x) match {
@@ -138,54 +211,96 @@ abstract class Width extends FirrtlNode {
}
}
/** Positive Integer Bit Width of a [[GroundType]] */
-case class IntWidth(width: BigInt) extends Width
-case object UnknownWidth extends Width
+case class IntWidth(width: BigInt) extends Width {
+ def serialize: String = s"<$width>"
+}
+case object UnknownWidth extends Width {
+ def serialize: String = ""
+}
/** Orientation of [[Field]] */
abstract class Orientation extends FirrtlNode
-case object Default extends Orientation
-case object Flip extends Orientation
+case object Default extends Orientation {
+ def serialize: String = ""
+}
+case object Flip extends Orientation {
+ def serialize: String = "flip "
+}
/** Field of [[BundleType]] */
-case class Field(name: String, flip: Orientation, tpe: Type) extends FirrtlNode with HasName
+case class Field(name: String, flip: Orientation, tpe: Type) extends FirrtlNode with HasName {
+ def serialize: String = flip.serialize + name + " : " + tpe.serialize
+}
abstract class Type extends FirrtlNode
abstract class GroundType extends Type {
val width: Width
}
abstract class AggregateType extends Type
-case class UIntType(width: Width) extends GroundType
-case class SIntType(width: Width) extends GroundType
-case class BundleType(fields: Seq[Field]) extends AggregateType
-case class VectorType(tpe: Type, size: Int) extends AggregateType
+case class UIntType(width: Width) extends GroundType {
+ def serialize: String = "UInt" + width.serialize
+}
+case class SIntType(width: Width) extends GroundType {
+ def serialize: String = "SInt" + width.serialize
+}
+case class BundleType(fields: Seq[Field]) extends AggregateType {
+ def serialize: String = "{ " + (fields map (_.serialize) mkString ", ") + "}"
+}
+case class VectorType(tpe: Type, size: Int) extends AggregateType {
+ def serialize: String = tpe.serialize + s"[$size]"
+}
case object ClockType extends GroundType {
val width = IntWidth(1)
+ def serialize: String = "Clock"
+}
+case object UnknownType extends Type {
+ def serialize: String = "?"
}
-case object UnknownType extends Type
/** [[Port]] Direction */
abstract class Direction extends FirrtlNode
-case object Input extends Direction
-case object Output extends Direction
+case object Input extends Direction {
+ def serialize: String = "input"
+}
+case object Output extends Direction {
+ def serialize: String = "output"
+}
/** [[DefModule]] Port */
-case class Port(info: Info, name: String, direction: Direction, tpe: Type) extends FirrtlNode with IsDeclaration
+case class Port(
+ info: Info,
+ name: String,
+ direction: Direction,
+ tpe: Type) extends FirrtlNode with IsDeclaration {
+ def serialize: String = s"${direction.serialize} $name : ${tpe.serialize}" + info.serialize
+}
/** Base class for modules */
abstract class DefModule extends FirrtlNode with IsDeclaration {
val info : Info
val name : String
val ports : Seq[Port]
+ protected def serializeHeader(tpe: String): String =
+ s"$tpe $name :" + info.serialize +
+ indent(ports map ("\n" + _.serialize) mkString) + "\n"
}
/** Internal Module
*
* An instantiable hardware block
*/
-case class Module(info: Info, name: String, ports: Seq[Port], body: Statement) extends DefModule
+case class Module(info: Info, name: String, ports: Seq[Port], body: Statement) extends DefModule {
+ def serialize: String = serializeHeader("module") + indent("\n" + body.serialize)
+}
/** External Module
*
* Generally used for Verilog black boxes
*/
-case class ExtModule(info: Info, name: String, ports: Seq[Port]) extends DefModule
+case class ExtModule(info: Info, name: String, ports: Seq[Port]) extends DefModule {
+ def serialize: String = serializeHeader("extmodule")
+}
-case class Circuit(info: Info, modules: Seq[DefModule], main: String) extends FirrtlNode with HasInfo
+case class Circuit(info: Info, modules: Seq[DefModule], main: String) extends FirrtlNode with HasInfo {
+ def serialize: String =
+ s"circuit $main :" + info.serialize +
+ (modules map ("\n" + _.serialize) map indent mkString "\n") + "\n"
+}