diff options
| author | chick | 2020-08-14 19:47:53 -0700 |
|---|---|---|
| committer | Jack Koenig | 2020-08-14 19:47:53 -0700 |
| commit | 6fc742bfaf5ee508a34189400a1a7dbffe3f1cac (patch) | |
| tree | 2ed103ee80b0fba613c88a66af854ae9952610ce /src/main/scala/firrtl/annotations/PresetAnnotations.scala | |
| parent | b516293f703c4de86397862fee1897aded2ae140 (diff) | |
All of src/ formatted with scalafmt
Diffstat (limited to 'src/main/scala/firrtl/annotations/PresetAnnotations.scala')
| -rw-r--r-- | src/main/scala/firrtl/annotations/PresetAnnotations.scala | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/src/main/scala/firrtl/annotations/PresetAnnotations.scala b/src/main/scala/firrtl/annotations/PresetAnnotations.scala index 727417c1..d6066aa7 100644 --- a/src/main/scala/firrtl/annotations/PresetAnnotations.scala +++ b/src/main/scala/firrtl/annotations/PresetAnnotations.scala @@ -10,11 +10,11 @@ package annotations * @param target ReferenceTarget to an AsyncReset */ case class PresetAnnotation(target: ReferenceTarget) - extends SingleTargetAnnotation[ReferenceTarget] with firrtl.transforms.DontTouchAllTargets { + extends SingleTargetAnnotation[ReferenceTarget] + with firrtl.transforms.DontTouchAllTargets { override def duplicate(n: ReferenceTarget) = this.copy(target = n) } - /** * Transform the targeted asynchronously-reset Reg into a bitstream preset Reg * Used internally to annotate all registers associated to an AsyncReset tree @@ -22,12 +22,10 @@ case class PresetAnnotation(target: ReferenceTarget) * @param target ReferenceTarget to a Reg */ private[firrtl] case class PresetRegAnnotation( - target: ReferenceTarget -) extends SingleTargetAnnotation[ReferenceTarget] with RegisterEmissionOption { + target: ReferenceTarget) + extends SingleTargetAnnotation[ReferenceTarget] + with RegisterEmissionOption { def duplicate(n: ReferenceTarget) = this.copy(target = n) override def useInitAsPreset = true override def disableRandomization = true } - - - |
