Merge pull request #1852 from freechipsproject/format-src-4

Apply Scalafmt Rewriting

1 files changed, 6 insertions, 5 deletions

diff --git a/src/main/scala/firrtl/analyses/NodeCount.scala b/src/main/scala/firrtl/analyses/NodeCount.scala
index 0276f4f5..63571503 100644
--- a/src/main/scala/firrtl/analyses/NodeCount.scala
+++ b/src/main/scala/firrtl/analyses/NodeCount.scala
@@ -21,18 +21,19 @@ class NodeCount private (node: FirrtlNode) {
 
   @tailrec
   private final def rec(xs: List[Any]): Unit =
-    if (xs.isEmpty) { }
-    else {
+    if (xs.isEmpty) {} else {
       val node = xs.head
-      require(node.isInstanceOf[Product] || !node.isInstanceOf[FirrtlNode],
-        "Unexpected FirrtlNode that does not implement Product!")
+      require(
+        node.isInstanceOf[Product] || !node.isInstanceOf[FirrtlNode],
+        "Unexpected FirrtlNode that does not implement Product!"
+      )
       val moreToVisit =
         if (identityMap.containsKey(node)) List.empty
         else { // Haven't seen yet
           identityMap.put(node, true)
           regularSet += node
           node match { // FirrtlNodes are Products
-            case p: Product => p.productIterator
+            case p: Product       => p.productIterator
             case i: Iterable[Any] => i
             case _ => List.empty
           }