diff options
| author | Jack Koenig | 2017-02-07 16:54:35 -0800 |
|---|---|---|
| committer | Adam Izraelevitz | 2017-02-07 16:54:35 -0800 |
| commit | 2f4ae9b4164cf415600de970b3ac5a1b9760efa5 (patch) | |
| tree | 6e131cd16157f921bb3ae83cb15caa0f53feb51a /src/main/scala/firrtl/WIR.scala | |
| parent | 16238da2b50706e511f22f257402a3c2c009c004 (diff) | |
Rework Attach to work on arbitrary Analog hierarchies (#415)
* Rework Attach to work on arbitrary Analog hierarchies
If there are zero or one Analog sources in an Attach (source meaning
wire or parent module port), then the Attach will be emitted as a simple
point to point connection. In the general case, alias is used for
simulation while forwards and backwards assigns for synthesis. Verilator
does not currently support the general case so an `ifdef Verilator
`error is emitted.
* Add helper functions for creating WRef from Reg and Wire
Diffstat (limited to 'src/main/scala/firrtl/WIR.scala')
| -rw-r--r-- | src/main/scala/firrtl/WIR.scala | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/src/main/scala/firrtl/WIR.scala b/src/main/scala/firrtl/WIR.scala index 0ce8f61e..bc256b68 100644 --- a/src/main/scala/firrtl/WIR.scala +++ b/src/main/scala/firrtl/WIR.scala @@ -30,6 +30,12 @@ case class WRef(name: String, tpe: Type, kind: Kind, gender: Gender) extends Exp def mapType(f: Type => Type): Expression = this.copy(tpe = f(tpe)) def mapWidth(f: Width => Width): Expression = this } +object WRef { + /** Creates a WRef from a Wire */ + def apply(wire: DefWire): WRef = new WRef(wire.name, wire.tpe, WireKind, UNKNOWNGENDER) + /** Creates a WRef from a Register */ + def apply(reg: DefRegister): WRef = new WRef(reg.name, reg.tpe, RegKind, UNKNOWNGENDER) +} case class WSubField(exp: Expression, name: String, tpe: Type, gender: Gender) extends Expression { def serialize: String = s"${exp.serialize}.$name" def mapExpr(f: Expression => Expression): Expression = this.copy(exp = f(exp)) @@ -77,15 +83,21 @@ case class WDefInstance(info: Info, name: String, module: String, tpe: Type) ext def mapType(f: Type => Type): Statement = this.copy(tpe = f(tpe)) def mapString(f: String => String): Statement = this.copy(name = f(name)) } -case class WDefInstanceConnector(info: Info, name: String, module: String, tpe: Type, exprs: Seq[Expression]) extends Statement with IsDeclaration { - def serialize: String = s"inst $name of $module with ${tpe.serialize} connected to (" + exprs.map(_.serialize).mkString(", ") + ")" + info.serialize - def mapExpr(f: Expression => Expression): Statement = this.copy(exprs = exprs map f) +case class WDefInstanceConnector( + info: Info, + name: String, + module: String, + tpe: Type, + portCons: Seq[(Expression, Expression)]) extends Statement with IsDeclaration { + def serialize: String = s"inst $name of $module with ${tpe.serialize} connected to " + + portCons.map(_._2.serialize).mkString("(", ", ", ")") + info.serialize + def mapExpr(f: Expression => Expression): Statement = + this.copy(portCons = portCons map { case (e1, e2) => (f(e1), f(e2)) }) def mapStmt(f: Statement => Statement): Statement = this def mapType(f: Type => Type): Statement = this.copy(tpe = f(tpe)) def mapString(f: String => String): Statement = this.copy(name = f(name)) } - // Resultant width is the same as the maximum input width case object Addw extends PrimOp { override def toString = "addw" } // Resultant width is the same as the maximum input width |
