Merge pull request #198 from ucb-bar/add-chirrtl-check

Added a Chirrtl check for undeclared wires, etc.

1 files changed, 21 insertions, 1 deletions

diff --git a/src/main/scala/firrtl/Utils.scala b/src/main/scala/firrtl/Utils.scala
index 2053a70d..76c8e61e 100644
--- a/src/main/scala/firrtl/Utils.scala
+++ b/src/main/scala/firrtl/Utils.scala
@@ -203,6 +203,22 @@ object Utils extends LazyLogging {
       }
    }
 
+   /** Returns true if t, or any subtype, contains a flipped field
+     * @param t [[firrtl.ir.Type]]
+     * @return if t contains [[firrtl.ir.Flip]]
+     */
+   def hasFlip(t: Type): Boolean = {
+      var has = false
+      def findFlip(t: Type): Type = t map (findFlip) match {
+         case t: BundleType =>
+            for (f <- t.fields) { if (f.flip == Flip) has = true }
+            t
+         case t: Type => t
+      }
+      findFlip(t)
+      has
+   }
+
 //============== TYPES ================
    def mux_type (e1:Expression,e2:Expression) : Type = mux_type(tpe(e1),tpe(e2))
    def mux_type (t1:Type,t2:Type) : Type = {
@@ -268,7 +284,11 @@ object Utils extends LazyLogging {
    }
    def long_BANG (t:Type) : Long = {
       (t) match {
-         case g: GroundType => g.width.as[IntWidth].get.width.toLong
+         case g: GroundType => 
+           g.width match {
+             case IntWidth(x) => x.toLong
+             case _ => throw new FIRRTLException(s"Expecting IntWidth, got: ${g.width}")
+           }
          case (t:BundleType) => {
             var w = 0
             for (f <- t.fields) { w = w + long_BANG(f.tpe).toInt }