diff options
| author | azidar | 2016-01-30 09:59:07 -0800 |
|---|---|---|
| committer | azidar | 2016-02-09 18:55:26 -0800 |
| commit | 9e26d71f1131cb086c4ac5cfa05369e40dfb3f1a (patch) | |
| tree | 7d3577573042bf330012b587ee71f67a76227ef3 /src/main/scala/firrtl/Utils.scala | |
| parent | f6917276250258091e98a51719b35cf5935ceabf (diff) | |
Added resolve genders
Diffstat (limited to 'src/main/scala/firrtl/Utils.scala')
| -rw-r--r-- | src/main/scala/firrtl/Utils.scala | 62 |
1 files changed, 42 insertions, 20 deletions
diff --git a/src/main/scala/firrtl/Utils.scala b/src/main/scala/firrtl/Utils.scala index f029d410..3b849e45 100644 --- a/src/main/scala/firrtl/Utils.scala +++ b/src/main/scala/firrtl/Utils.scala @@ -143,8 +143,30 @@ object Utils { def serialize(implicit flags: FlagMap = FlagMap): String = op.getString } +// =========== GENDER UTILS ============ + def swap (g:Gender) : Gender = { + g match { + case UNKNOWNGENDER => UNKNOWNGENDER + case MALE => FEMALE + case FEMALE => MALE + case BIGENDER => BIGENDER + } + } +// =========== FLIP UTILS =============== + def field_flip (v:Type,s:String) : Flip = { + v match { + case v:BundleType => { + val ft = v.fields.find {p => p.name == s} + ft match { + case ft:Some[Field] => ft.get.flip + case ft => DEFAULT + } + } + case v => DEFAULT + } + } -// ACCESSORS ========= +// =========== ACCESSORS ========= def gender (e:Expression) : Gender = { e match { case e:WRef => gender(e) @@ -206,22 +228,22 @@ object Utils { case s:DefNode => tpe(s.value) case s:DefMemory => { val depth = s.depth - val addr = Field("addr",Default,UIntType(IntWidth(ceil_log2(depth)))) - val en = Field("en",Default,BoolType()) - val clk = Field("clk",Default,ClockType()) - val def_data = Field("data",Default,s.data_type) - val rev_data = Field("data",Reverse,s.data_type) - val mask = Field("mask",Default,create_mask(s.data_type)) - val wmode = Field("wmode",Default,UIntType(IntWidth(1))) - val rdata = Field("rdata",Reverse,s.data_type) + val addr = Field("addr",DEFAULT,UIntType(IntWidth(ceil_log2(depth)))) + val en = Field("en",DEFAULT,BoolType()) + val clk = Field("clk",DEFAULT,ClockType()) + val def_data = Field("data",DEFAULT,s.data_type) + val rev_data = Field("data",REVERSE,s.data_type) + val mask = Field("mask",DEFAULT,create_mask(s.data_type)) + val wmode = Field("wmode",DEFAULT,UIntType(IntWidth(1))) + val rdata = Field("rdata",REVERSE,s.data_type) val read_type = BundleType(Seq(rev_data,addr,en,clk)) val write_type = BundleType(Seq(def_data,mask,addr,en,clk)) val readwrite_type = BundleType(Seq(wmode,rdata,def_data,mask,addr,en,clk)) val mem_fields = Vector() - s.readers.foreach {x => mem_fields :+ Field(x,Reverse,read_type)} - s.writers.foreach {x => mem_fields :+ Field(x,Reverse,write_type)} - s.readwriters.foreach {x => mem_fields :+ Field(x,Reverse,readwrite_type)} + s.readers.foreach {x => mem_fields :+ Field(x,REVERSE,read_type)} + s.writers.foreach {x => mem_fields :+ Field(x,REVERSE,write_type)} + s.readwriters.foreach {x => mem_fields :+ Field(x,REVERSE,readwrite_type)} BundleType(mem_fields) } case s:DefInstance => UnknownType() @@ -461,22 +483,22 @@ object Utils { implicit class FlipUtils(f: Flip) { def serialize(implicit flags: FlagMap = FlagMap): String = { val s = f match { - case Reverse => "flip " - case Default => "" + case REVERSE => "flip " + case DEFAULT => "" } s + debug(f) } def flip(): Flip = { f match { - case Reverse => Default - case Default => Reverse + case REVERSE => DEFAULT + case DEFAULT => REVERSE } } def toDirection(): Direction = { f match { - case Default => Output - case Reverse => Input + case DEFAULT => Output + case REVERSE => Input } } } @@ -529,8 +551,8 @@ object Utils { } def toFlip(): Flip = { d match { - case Input => Reverse - case Output => Default + case Input => REVERSE + case Output => DEFAULT } } } |
