diff options
| author | jackkoenig | 2016-09-23 13:44:57 -0700 |
|---|---|---|
| committer | Jack Koenig | 2016-10-26 15:15:37 -0700 |
| commit | 4c3b4f4dc10c380a101df75cb561e3f79f1a6abe (patch) | |
| tree | feb382146fff5d5496079b6d7c4d3d530bd65cda /src/main/scala/firrtl/Emitter.scala | |
| parent | 4b8a0d2af52ceeb3ff5d05082af53bac76744361 (diff) | |
Add RawString ExtModule parameter support
While unsafe, this supports Verilog parameter types.
Tests now require Verilator 3.884+ to pass.
Diffstat (limited to 'src/main/scala/firrtl/Emitter.scala')
| -rw-r--r-- | src/main/scala/firrtl/Emitter.scala | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/Emitter.scala b/src/main/scala/firrtl/Emitter.scala index e3a146e2..5a4420c6 100644 --- a/src/main/scala/firrtl/Emitter.scala +++ b/src/main/scala/firrtl/Emitter.scala @@ -89,6 +89,7 @@ class VerilogEmitter extends Emitter { case StringParam(name, value) => val strx = "\"" + VerilogStringLitHandler.escape(value) + "\"" s".${name}($strx)" + case RawStringParam(name, value) => s".$name($value)" } def emit(x: Any)(implicit w: Writer) { emit(x, 0) } def emit(x: Any, top: Int)(implicit w: Writer) { |