diff options
| author | Adam Izraelevitz | 2016-11-23 11:57:02 -0800 |
|---|---|---|
| committer | Jack Koenig | 2016-11-23 11:57:02 -0800 |
| commit | 66d3ec0498a73319a914eeffcb4e0b1109b5f4c5 (patch) | |
| tree | 325066fd05cc72b544d3b4d78d646e1a864119f3 /src/main/scala/firrtl/Compiler.scala | |
| parent | 9a967a27aa8bb51f4b62969d2889f9a9caa48e31 (diff) | |
Stringified annotations (#367)
Restricts annotations to be string-based (and thus less typesafe)
Makes annotations more easily serializable and interact with Chisel
Diffstat (limited to 'src/main/scala/firrtl/Compiler.scala')
| -rw-r--r-- | src/main/scala/firrtl/Compiler.scala | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala index 2e155885..106c973f 100644 --- a/src/main/scala/firrtl/Compiler.scala +++ b/src/main/scala/firrtl/Compiler.scala @@ -4,7 +4,7 @@ package firrtl import logger.LazyLogging import java.io.Writer -import Annotations._ +import annotations._ import firrtl.ir.Circuit import passes.Pass @@ -15,6 +15,14 @@ import passes.Pass */ case class RenameMap(map: Map[Named, Seq[Named]]) +/** + * Container of all annotations for a Firrtl compiler. + */ +case class AnnotationMap(annotations: Seq[Annotation]) { + def get(id: Class[_]): Seq[Annotation] = annotations.filter(a => a.transform == id) + def get(named: Named): Seq[Annotation] = annotations.filter(n => n == named) +} + /** Current State of the Circuit * * @constructor Creates a CircuitState object |
