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| author | Andrew Waterman | 2016-04-13 14:02:19 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2016-04-14 15:45:30 -0700 |
| commit | 3adf138536e47196c076befe614b4f34e41c73ef (patch) | |
| tree | 3c41e947329b5a024d2950d657a8b4bfaa2d5126 /src/main/scala/firrtl/Compiler.scala | |
| parent | a135b267cd148f3af43fb01b096ec0b4376d6b13 (diff) | |
Add CSE pass
Diffstat (limited to 'src/main/scala/firrtl/Compiler.scala')
| -rw-r--r-- | src/main/scala/firrtl/Compiler.scala | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/main/scala/firrtl/Compiler.scala b/src/main/scala/firrtl/Compiler.scala index f87e2c71..3b7b35fa 100644 --- a/src/main/scala/firrtl/Compiler.scala +++ b/src/main/scala/firrtl/Compiler.scala @@ -84,6 +84,7 @@ object VerilogCompiler extends Compiler { ResolveGenders, InferWidths, ConstProp, + CommonSubexpressionElimination, DeadCodeElimination, VerilogWrap, SplitExp, |