diff options
| author | Jack Koenig | 2019-02-14 15:08:35 -0800 |
|---|---|---|
| committer | GitHub | 2019-02-14 15:08:35 -0800 |
| commit | 2272044c6ab46b5148c39c124e66e1a8e9073a24 (patch) | |
| tree | 83ad2141b1a3c54707dd9b33073f9217b0ae16c8 /src/main/proto/firrtl.proto | |
| parent | d487b4cb6726e7e8d1a18f894021652594125221 (diff) | |
Asynchronous Reset (#1011)
Fixes #219
* Adds AsyncResetType (similar to ClockType)
* Registers with reset signal of type AsyncResetType are async reset
registers
* Registers with async reset can only be reset to literal values
* Add initialization logic for async reset registers
Diffstat (limited to 'src/main/proto/firrtl.proto')
| -rw-r--r-- | src/main/proto/firrtl.proto | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/main/proto/firrtl.proto b/src/main/proto/firrtl.proto index 7be042ab..8f115c5e 100644 --- a/src/main/proto/firrtl.proto +++ b/src/main/proto/firrtl.proto @@ -262,6 +262,10 @@ message Firrtl { // Empty. } + message AsyncResetType { + // Empty. + } + message BundleType { message Field { // Required. @@ -299,6 +303,7 @@ message Firrtl { VectorType vector_type = 6; FixedType fixed_type = 7; AnalogType analog_type = 8; + AsyncResetType async_reset_type = 9; } } @@ -425,6 +430,7 @@ message Firrtl { OP_SHIFT_BINARY_POINT_LEFT = 35; OP_SHIFT_BINARY_POINT_RIGHT = 36; OP_SET_BINARY_POINT = 37; + OP_AS_ASYNC_RESET = 38; } // Required. |
