Added eqv for bitwise equality, and change eq to be arithmetic equality

1 files changed, 1 insertions, 1 deletions

diff --git a/TODO b/TODO
index e91c536a..56007996 100644
--- a/TODO
+++ b/TODO
@@ -5,10 +5,10 @@
 ======== Current Tasks ========
 add include support
 change parser to accept subword, but error
---Merge with master
 put clocks on accessors
 add clock check to high firrtl check
 registers in onreset cannot have flips
+add equivalence to spec
 
 Tests:
    Lowering for instance types with bundle ports