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authorazidar2015-09-29 15:49:52 -0700
committerazidar2015-09-29 15:49:52 -0700
commit2a9bd217e6d8e519bc78f66e44502d77fa9cdc1d (patch)
tree8c74300cbf7eaf289fc0121c1fdd3efb0b378b07 /TODO
parentd380b8cfd11d2fe1231774f7b9492aff959bb279 (diff)
Added DecToIndexer/DecFromIndexer. Fixed most use cases of incorrect catching of initialization of accessors. Missing use case of accessing an accessor. Still need to update tests to pass
Diffstat (limited to 'TODO')
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diff --git a/TODO b/TODO
index 1c85c5f1..b8086632 100644
--- a/TODO
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@@ -3,6 +3,7 @@ Support ASIC backend
Mem of vec, should just work?
ASIC rams (pass to replace smem with black box)
Readwrite Port
+Move WorkingIR->RealIR right after width inference, update other passes accordingly
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========== ADAM's BIG ARSE TODO LIST ============