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authorjackbackrack2015-04-21 13:54:26 -0700
committerjackbackrack2015-04-21 13:54:26 -0700
commit0745b7c1fd0f73e4124766fd2fc19a3c2e8b5473 (patch)
tree3250960f3e8e29062e17e77887c833f7e2ba921c /TODO
parent2766967ca7f9afb4bf8680098b94d1562ff743a6 (diff)
parent9cd328709730702f0e3e192521e6f739e77c7d1a (diff)
merge
Diffstat (limited to 'TODO')
-rw-r--r--TODO16
1 files changed, 12 insertions, 4 deletions
diff --git a/TODO b/TODO
index 46ee3536..1f95a8ad 100644
--- a/TODO
+++ b/TODO
@@ -2,12 +2,15 @@
========== ADAM's BIG ASS TODO LIST ============
================================================
-Important things:
+======== Current Tasks ========
+on-reset
+Parser
+ Error if incorrectly assign stuff, like use = instead of :=
+ Update parser and update tests
======== Update Core ==========
-Change all primops to be strict on data widths
-Update parser and update tests
on-reset
+Change all primops to be strict on data widths
Add source locaters
Add Unit Tests for each pass
@@ -28,6 +31,8 @@ Well-formed low firrtl
All things only assigned to once
======== Other Passes ========
+constant folding (partial eval) pass
+common subexpression elimination pass
======== Consultations ========
Stephen:
@@ -35,11 +40,11 @@ Stephen:
pin stephen on an example
======== Think About ========
+dlsh,drsh
naming for split nodes
subword accesses
annotation system
zero-width wires
-on-reset
expanding mems (consider changing defmem to be size, and element type)
Make instances always male, flip the bundles on declaration
Multi-streams for print statements/asserts (Jack)
@@ -72,6 +77,9 @@ Bounds checks for accessors
Overflow checks for add/add-wrap
Check combinational
Fast C++ where wires/register/instances are predicated
+Verilog backend - put stuff in posedge clock, not assign statements, for speedup
+Annotate mems with location stuff
+Coverage tests, such as statespace or specific instances (like asserts, sort of)
======== FIRRTL++ =========
Variable size FIFOs