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authorazidar2015-08-30 16:30:47 -0700
committerazidar2015-08-31 09:13:44 -0700
commit8ac318d1937790acf50880c91f674818f9721490 (patch)
tree9f092295d1081cd2d78d300c88f9bfaadbbe7f1c /TODO
parentc561cb225ed564c83ea636644af96fd2e6dee0ab (diff)
Updated spec
Diffstat (limited to 'TODO')
-rw-r--r--TODO2
1 files changed, 0 insertions, 2 deletions
diff --git a/TODO b/TODO
index a1e27b4d..1c85c5f1 100644
--- a/TODO
+++ b/TODO
@@ -12,9 +12,7 @@ Support ASIC backend
don't split on asuint and assint, and no need to emit cast of $unsigned
put clocks on accessors
add clock check to high firrtl check
-add equivalence to spec
-remove SInt from bit/bits in spec
naming still doesn't work - x!0 will conflict with x
think about inferring read enable from lo firrtl