Added new test that breaks current parser. updated todo

1 files changed, 6 insertions, 8 deletions

diff --git a/TODO b/TODO
index 1f95a8ad..bf847a6f 100644
--- a/TODO
+++ b/TODO
@@ -1,5 +1,5 @@
 ================================================
-========== ADAM's BIG ASS TODO LIST ============
+========== ADAM's BIG ARSE TODO LIST ============
 ================================================
 
 ======== Current Tasks ========
@@ -7,16 +7,15 @@ on-reset
 Parser
    Error if incorrectly assign stuff, like use = instead of :=
    Update parser and update tests
+Change all primops to be strict on data widths
+Make instances always male, flip the bundles on declaration
+dlsh,drsh
    
 ======== Update Core ==========
-on-reset
-Change all primops to be strict on data widths
 Add source locaters
 Add Unit Tests for each pass
 
 ======== Check Passes ==========
-Parser
-   Error if incorrectly assign stuff, like use = instead of :=
 Well-formed high firrtl 
    Unique names per module
    No name can be a prefix of any other name.
@@ -40,13 +39,12 @@ Stephen:
       pin stephen on an example
 
 ======== Think About ========
-dlsh,drsh
-naming for split nodes
 subword accesses
+verilog style guide
+naming for split nodes
 annotation system
 zero-width wires
 expanding mems (consider changing defmem to be size, and element type)
-Make instances always male, flip the bundles on declaration
 Multi-streams for print statements/asserts (Jack)
 Consider def female node. (Patrick) 
 Talk to palmer/patrick about how writing passes is going to be supported