sfcX/test/passes/infer-widths, branch master

Remove stanza (#231)

2016-08-15T17:32:41+00:00

* Removed stanza implementation/tests.

In the future we can move the stanza tests over, but for now they should
be deleted.

* Added back integration .fir files

* Added Makefile to give Travis hooks

* Added firrtl script (was ignored before)

Updated all tests to pass

2016-01-28T17:25:04+00:00

WIP. Fixed a bunch of tests. Starting on implementing chirrtl, but hit roadblock in assigning clocked ports

2016-01-16T22:28:17+00:00

New memory works with verilog. Slowly changing tests and fixing bugs.

2016-01-16T22:28:17+00:00

Decided to not have Conditionally in low firrtl - instead, Print and
Stop have enables

Changed all tests to use verilog backend.

2015-08-24T18:45:37+00:00

Updated shr test so it is an expected pass

2015-08-18T23:39:07+00:00

Added tests for shl and mem. Fixed bug in verilog output of mem size.

2015-08-17T20:35:24+00:00

Updated tests to pipe from stderr to stdout

2015-07-31T23:05:53+00:00

Added tests for clocks. Added remove scope and special chars passes. Added tests. Made more tests pass

2015-07-14T18:29:55+00:00

Pass most tests. The ones that do not pass are not expected to, yet

2015-07-14T18:29:55+00:00