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<title>sfcX/test/errors/gender, branch sfc-scala3</title>
<subtitle>Scala FIRRTL Compiler for chiselX</subtitle>
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<entry>
<title>Remove stanza (#231)</title>
<updated>2016-08-15T17:32:41+00:00</updated>
<author>
<name>Adam Izraelevitz</name>
</author>
<published>2016-08-15T17:32:41+00:00</published>
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* Removed stanza implementation/tests.

In the future we can move the stanza tests over, but for now they should
be deleted.

* Added back integration .fir files

* Added Makefile to give Travis hooks

* Added firrtl script (was ignored before)
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* Removed stanza implementation/tests.

In the future we can move the stanza tests over, but for now they should
be deleted.

* Added back integration .fir files

* Added Makefile to give Travis hooks

* Added firrtl script (was ignored before)
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</entry>
<entry>
<title>Updated all tests to pass</title>
<updated>2016-01-28T17:25:04+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2016-01-26T22:18:34+00:00</published>
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<entry>
<title>Fixed a bunch of tests, and minor bugs</title>
<updated>2016-01-16T22:28:18+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2016-01-08T01:15:31+00:00</published>
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<entry>
<title>New memory works with verilog. Slowly changing tests and fixing bugs.</title>
<updated>2016-01-16T22:28:17+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-12-10T02:31:45+00:00</published>
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<content type='text'>
Decided to not have Conditionally in low firrtl - instead, Print and
Stop have enables
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Decided to not have Conditionally in low firrtl - instead, Print and
Stop have enables
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</entry>
<entry>
<title>Added tests, cleaned up repo</title>
<updated>2015-08-20T22:35:43+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-08-20T22:35:43+00:00</published>
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<entry>
<title>Added verilog keywords to uniquify them</title>
<updated>2015-08-04T20:58:06+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-08-04T20:58:06+00:00</published>
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<entry>
<title>Fixed reading from instance's input ports. Fixed unique naming bug.</title>
<updated>2015-08-04T19:32:45+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-08-04T19:32:45+00:00</published>
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<entry>
<title>Changed name mangling to use _ as a delin. Fixed bug in checking for</title>
<updated>2015-08-04T01:39:55+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-08-04T01:39:55+00:00</published>
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invalid &lt;&gt; assignments.
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invalid &lt;&gt; assignments.
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<entry>
<title>Fixed performance bug in Split Expressions. Changed delin for connect indexed. Fixed various broken tests.</title>
<updated>2015-08-03T18:51:50+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-08-03T18:51:50+00:00</published>
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<entry>
<title>Reading from output ports no longer causes errors</title>
<updated>2015-08-01T00:27:38+00:00</updated>
<author>
<name>azidar</name>
</author>
<published>2015-08-01T00:27:38+00:00</published>
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