sfcX/scripts, branch master Scala FIRRTL Compiler for chiselX Make formal_equiv.sh robust to changes to ANTLR & Protobuf 2021-12-01T19:40:52+00:00 Jack Koenig 2021-12-01T19:31:12+00:00 5ae1d2544514aa04240df7ed7f36442838dda9ea 






Switch from Travis to Github Actions CI (#2041)
2021-01-19T19:51:33+00:00

Jack Koenig

2021-01-19T19:51:33+00:00

bbd7fc4115728ecc7cf88bf0524f2126d8220c34

* Fix .run_formal_checks for Github Actions instead of Travis
* Remove .run_chisel_tests

Because we publish SNAPSHOTs on every merge to master, the Chisel repo
checks against master of FIRRTL regularly

* Only run unidoc for Scala 2.12

Under Travis we ran for 2.11, 2.12, and 2.13, but it doesn't work when
using ++2.<major>.<minor> when major != to 2.12. It seems if we want to
run all 3, we have to run as `sbt +unidoc`. It's not clear how much
benefit we get from building on the other versions, so stick with 2.12
for now.

* Generate .mergify.yml with script in chisel-repo-tools

Generated with config:

conditions:
  - status-success=all tests passed
branches:
  - 1.2.x
  - 1.3.x
  - 1.4.x




* Fix .run_formal_checks for Github Actions instead of Travis
* Remove .run_chisel_tests

Because we publish SNAPSHOTs on every merge to master, the Chisel repo
checks against master of FIRRTL regularly

* Only run unidoc for Scala 2.12

Under Travis we ran for 2.11, 2.12, and 2.13, but it doesn't work when
using ++2.<major>.<minor> when major != to 2.12. It seems if we want to
run all 3, we have to run as `sbt +unidoc`. It's not clear how much
benefit we get from building on the other versions, so stick with 2.12
for now.

* Generate .mergify.yml with script in chisel-repo-tools

Generated with config:

conditions:
  - status-success=all tests passed
branches:
  - 1.2.x
  - 1.3.x
  - 1.4.x






Change to Apache 2.0 License (#1901)
2020-09-17T01:52:16+00:00

Chick Markley

2020-09-17T01:52:16+00:00

ecb96e83324ea17cf38b7b90753d745d3c7f51bd












Use Travis Workspaces (#1675)
2020-06-09T23:07:08+00:00

Jack Koenig

2020-06-09T23:07:08+00:00

1769f8d71c3d527325c47c689cc4745913cf0f17

* Use Travis Workspaces

Add stage to build FIRRTL and share it with later steps running the
tests

* [CI] Do not sbt clean in formal_equiv.sh

This change takes advantage of shared workspace in Travis

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>




* Use Travis Workspaces

Add stage to build FIRRTL and share it with later steps running the
tests

* [CI] Do not sbt clean in formal_equiv.sh

This change takes advantage of shared workspace in Travis

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>






Add parse_firrtl_transform_log utility script (#1543)
2020-05-07T06:10:39+00:00

Jack Koenig

2020-05-07T06:10:39+00:00

9bc953ca4d443eb9a66d9785b17f1f71ee730330

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>




Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>






Bump yosys to 0.8 (#1029)
2019-02-22T05:21:15+00:00

Adam Izraelevitz

2019-02-22T05:21:15+00:00

ea43e484959d4edd031a1420a775204aac41aa13












Bump sbt (#703)
2017-12-18T20:01:22+00:00

Jack Koenig

2017-12-18T20:01:22+00:00

8ab501e7527139a4ee8d0b38f9b4384551387043

Bump SBT to 1.0.4 and update plugins
Update Scala versions and sbt commands in .travis.yml
Replace run-main with runMain





Bump SBT to 1.0.4 and update plugins
Update Scala versions and sbt commands in .travis.yml
Replace run-main with runMain







Refactor formal equivalence CI test
2017-12-12T23:34:43+00:00

Jack Koenig

2017-12-12T23:33:00+00:00

0d794d57df7b388109d7a0834d3b5be8f79892be

Make the check script allow different designs
Add FPU, ICache, and RocketCore to regress and use instead of Rob for CI
equivalence check





Make the check script allow different designs
Add FPU, ICache, and RocketCore to regress and use instead of Rob for CI
equivalence check







Make Yosys equivalence check more robust (#686)
2017-11-16T21:33:22+00:00

Jack Koenig

2017-11-16T21:33:22+00:00

4429e2112aa958acab2ab43b0bf1d4c43becb50e

Also let Travis know that equivalence checks can take a while




Also let Travis know that equivalence checks can take a while






Add script for formally comparing emitted Verilog
2017-10-02T06:55:13+00:00

Jack Koenig

2017-10-01T21:09:02+00:00

b103bc89a6819115651b244df191f00969a539af

Also add Travis test for running this script on PRs





Also add Travis test for running this script on PRs