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\newcommand{\sailfclCAndPermBrokenexecute}{\saildoclabelled{fclCAndPermBrokenzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability
register \emph{cs1} with the \cperms{} field set to the bitwise-AND of
its previous value and bits 0 .. 10 of integer register \emph{rs2}
and the \cuperms{} field set to the bitwise and of its previous value
and bits \hyperref\hyperref[ztablezGpseudocodezDconstants]{\lstinline{table:pseudocode-constants}}{\emph{first\_uperm}} ..
\hyperref\hyperref[ztablezGpseudocodezDconstants]{\lstinline{table:pseudocode-constants}}{\emph{last\_uperm}} of \emph{rd}.
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register \emph{cs1} with the \cperms{} field set to the bitwise-AND of
its previous value and bits 0 .. 10 of integer register \emph{rs2}
and the \cuperms{} field set to the bitwise and of its previous value
and bits \hyperref[table:pseudocode-constants]{\emph{first\_uperm}} ..
\hyperref[table:pseudocode-constants]{\emph{last\_uperm}} of \emph{rd}.
}{\lstinputlisting[language=sail]{out/fclCAndPermEscapedzexecute33a689e3a631b9b905b85461d3814943.tex}}}}
\newcommand{\sailfclCAndPermMarkdownexecute}{\saildoclabelled{fclCAndPermMarkdownzexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability
register \emph{cs1} with the \cperms{} field set to the bitwise-AND of
its previous value and bits 0 .. 10 of integer register \emph{rs2}
and the \cuperms{} field set to the bitwise and of its previous value
and bits \hyperref[table:pseudocode-constants]{*first_uperm*} ..
\hyperref[table:pseudocode-constants]{*last_uperm*} of \emph{rd}.
}{\lstinputlisting[language=sail]{out/fclCAndPermMarkdownzexecute33a689e3a631b9b905b85461d3814943.tex}}}}
\newcommand{\sailfclCAndPermMarkdownWithRefMacroexecute}{\saildoclabelled{fclCAndPermMarkdownWithRefMacrozexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability
register \emph{cs1} with the \cperms{} field set to the bitwise-AND of
its previous value and bits 0 .. 10 of integer register \emph{rs2}
and the \cuperms{} field set to the bitwise and of its previous value
and bits \firstUPerm{} .. \lastUPerm{} of \emph{rd}.
}{\lstinputlisting[language=sail]{out/fclCAndPermMarkdownWithRefMacrozexecute33a689e3a631b9b905b85461d3814943.tex}}}}
\newcommand{\sailfclCAndPermMarkdownWithExceptionsexecute}{\saildoclabelled{fclCAndPermMarkdownWithExceptionszexecute}{\saildocfcl{Capability register \emph{cd} is replaced with the contents of capability
register \emph{cs1} with the \cperms{} field set to the bitwise-AND of
its previous value and bits 0 .. 10 of integer register \emph{rs2}
and the \cuperms{} field set to the bitwise and of its previous value
and bits \firstUPerm{} .. \lastUPerm{} of \emph{rd}.
\subsubsection*{Exceptions:}
An exception is raised if:
\begin{itemize}
\item \emph{cs1.tag} is not set.
\item \emph{cs1} is sealed.
\end{itemize}
}{\lstinputlisting[language=sail]{out/fclCAndPermMarkdownWithExceptionszexecute33a689e3a631b9b905b85461d3814943.tex}}}}
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}
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