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| `MIPSThreadStart -> `MIPSThreadStart
| `MIPSRType (op, rd, rs, rt) -> `MIPSRType (op, map_reg rd, map_reg rs, map_reg rt)
| `MIPSIType (op, rs, rt, imm) -> `MIPSIType (op, map_reg rs, map_reg rt, imm)
| `MIPSShiftI (op, rd, rt, imm) -> `MIPSShiftI (op, map_reg rd, map_reg rt, imm)
| `MIPSShiftV (op, rd, rt, rs) -> `MIPSShiftV (op, map_reg rd, map_reg rt, map_reg rs)
| `MIPSMulDiv (op, rs, rt) -> `MIPSMulDiv (op, map_reg rs, map_reg rt)
| `MIPSMFHiLo (op, rs) -> `MIPSMFHiLo (op, map_reg rs)
| `MIPSLUI (rt, imm) -> `MIPSLUI (map_reg rt, imm)
| `MIPSLoad (width, signed, linked, base, rt, offset) -> `MIPSLoad (width, signed, linked, map_reg base, map_reg rt, offset)
| `MIPSStore (width, conditional, base, rt, offset) -> `MIPSStore (width, conditional, map_reg base, map_reg rt, offset)
| `MIPSLSLR (store, double, left, base, rt, offset) -> `MIPSLSLR (store, double, left, map_reg base, map_reg rt, offset)
| `MIPSSYNC -> `MIPSSYNC
| `MIPSBEQ (rs, rt, offset, ne, likely) -> `MIPSBEQ (map_reg rs, map_reg rt, offset, ne, likely)
| `MIPSBCMPZ (rs, offset, cmp, link, likely) -> `MIPSBCMPZ (map_reg rs, offset, cmp, link, likely)
| `MIPSJ (offset) -> `MIPSJ (offset)
| `MIPSJAL (offset) -> `MIPSJAL (offset) (* implicit R31? *)
| `MIPSJR (rd) -> `MIPSJR (map_reg rd)
| `MIPSJALR (rd, rs) -> `MIPSJALR(map_reg rd, map_reg rs)
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